Semiconductor Trench Structure Enhancing Avalanche Resistance
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Solution Overview
Problem
The existing semiconductor devices, such as MOSFETs and IGBTs, suffer from reduced avalanche resistance due to the narrowing of the current path caused by the formation of MOS diodes between adjacent transistors, which affects their performance and reliability.
Innovation Solution
The semiconductor device incorporates a specific trench structure with alternating impurity regions and electrodes, including a high impurity concentration region between second trenches, which enhances avalanche resistance by facilitating better hole extraction and maintaining desired electric characteristics while minimizing device size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a MOS diode is formed between adjacent MOSFETs, then device integration is achieved, but avalanche resistance is reduced due to narrowed current path
Solution Approach 1:
The patent applies local quality by creating alternating impurity regions with different conductivity types (first and second impurity regions) and varying impurity concentrations (first, second, and third impurity regions with progressively higher concentrations) in specific locations between the MOS diode and trench. This localized modification of material properties enhances avalanche resistance in critical areas without affecting the overall device integration achieved by the MOS diode structure.
Solution Approach 2:
The patent changes physical parameters by introducing multiple impurity regions with different conductivity types and impurity concentrations. The first impurity region has a first conductivity type, the second impurity region has a second conductivity type opposite to the first, and the third impurity region has higher impurity concentration than the first. These parameter changes modify the electrical characteristics to improve avalanche resistance while maintaining device integration.
2Reliability
If alternating impurity regions with higher concentration are introduced, then avalanche resistance is improved, but device complexity increases
Solution Approach 1:
The patent segments the region between the MOS diode and trench into multiple distinct impurity regions (first, second, and third impurity regions) with different conductivity types and concentrations. This segmentation allows each region to perform a specific function in managing avalanche characteristics, improving reliability while keeping the overall structure organized and manufacturable through systematic segmentation rather than random complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly improves avalanche resistance and switching performance while maintaining the current path integrity, ensuring reliable operation without increasing the device size, and can be applied to both MOSFETs and IGBTs.
Implementation Method 1
facilitating better hole extraction and maintaining desired electric characteristics
Data Source
AI summary
A semiconductor device has a plurality of transistors, which have first electrodes in first trenches, and includes: two second trenches, which are formed side by side between the first trenches. A second electrode is formed in each of the two second trenches. A first impurity region is formed between the first trench and the second trench; a second impurity region is formed to abut on the first trench; a third impurity region is formed to abut on the second trench; a fourth impurity region, which is formed between two of the second trenches and has a higher impurity concentration than the first impurity region; and a fifth impurity region is formed below the first impurity region and the fourth impurity region. A third electrode is formed to be electrically connected to the first impurity region, the second impurity region, the third impurity region, and the fourth impurity region.