Semiconductor Device Trench-Bottom High-Concentration Region

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Solution Overview

Problem

High-speed switching and short circuits in semiconductor devices can lead to transient currents that cause voltage drops, potentially resulting in dielectric breakdown of the gate-drain insulating film, particularly in the field relaxing region.

Innovation Solution

A semiconductor device configuration that includes a trench-bottom high-concentration region extending from the gate connection layer to the outer contact, reducing voltage drops during high-speed switching or short circuits, and incorporating a trench-bottom high-concentration region with higher impurity concentration to minimize resistance and enhance switching performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a field relaxing region is provided to protect the gate insulating film from dielectric breakdown, then the reliability of the gate insulating film is improved, but voltage drops occur during high-speed switching causing dielectric breakdown

Engineering Contradiction:

Improvegate insulating film reliabilityVSAvoidvoltage drop during switching

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating a trench-bottom high-concentration region with higher impurity concentration specifically at the bottom of the gate trench where the gate insulating film is most vulnerable. This localized high-concentration region reduces resistance precisely where needed to minimize voltage drops during switching, while maintaining the field relaxing region's protective function. The selective modification of impurity concentration at the trench bottom addresses the voltage drop issue without compromising the overall reliability improvements from the field relaxing region.

Inventive Principle:

Principle #3Local quality

2Loss of energy

If the impurity concentration in the field relaxing region is increased to reduce resistance, then switching loss is reduced, but the field relaxing effect may be compromised

Engineering Contradiction:

Improveswitching lossVSAvoidfield relaxing effect

Core Design Contradiction:

Loss of energyVSReliability

Solution Approach 1:

The patent segments the impurity concentration modification into two distinct zones: the field relaxing region maintains its original impurity concentration to preserve the field relaxing effect, while a separate trench-bottom high-concentration region is created with higher impurity concentration to reduce resistance and switching loss. This segmentation allows each region to fulfill its specific function without interfering with the other, resolving the contradiction between maintaining field relaxing effect and reducing switching loss.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by concentrating the impurity enhancement specifically at the trench bottom rather than uniformly increasing impurity concentration throughout the field relaxing region. This localized approach reduces resistance and switching loss in the critical area where voltage drops occur during switching, while preserving the field relaxing effect in the broader region by maintaining its original impurity concentration.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses dielectric breakdown of the gate insulating film and reduces switching loss by minimizing voltage drops and enhancing the response speed of the depletion layer during high-speed switching and short circuits.

Implementation Method 1

Methodology Applied

Scientific EffectElectrical Resistance: Electrical Resistance

Implementation Method 2

enhancing the response speed of the depletion layer during high-speed switching and short circuits

Methodology Applied

Scientific EffectDepletion layer:

Implementation Method 3

The solution effectively suppresses dielectric breakdown of the gate insulating film

Methodology Applied

Scientific EffectDielectric breakdown:

Data Source

PatentUS11049931B2Semiconductor device

Publication Date: 2021.06.29 MITSUBISHI ELECTRIC CORP

AI summary

A gate connection layer (14) includes a portion placed on an outer trench (TO) with a gate insulating film (7) being interposed. A first main electrode (10) includes a main contact (CS) electrically connected to a well region (4) and a first impurity region (5) within an active region (30), and an outer contact (CO) being spaced away from the active region (30) and in contact with a bottom face of the outer trench (TO). A trench-bottom field relaxing region (13) is provided in a drift layer (3). A trench-bottom high-concentration region (18) has an impurity concentration higher than that of the trench-bottom field relaxing region (13), is provided on the trench-bottom field relaxing region (13), and extends from a position where it faces the gate connection layer (14) with the gate insulating film (7) being interposed, to a position where it is in contact with the outer contact (CO) of the first main electrode (10).