Semiconductor Trench Capacitor Stress Management
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Solution Overview
Problem
The manufacturing process of capacitors with trenches on semiconductor substrates often results in substrate cracks due to stress accumulation from thermal oxide film growth and electrode formation, particularly when insulation layers contact at trench tips and are subjected to further stress from electrode formation and voltage application.
Innovation Solution
A semiconductor device design with a trench structure where the thickness of the insulation layer is greater than the first and second electrode layers, reducing stress accumulation and mechanical strength enhancement, thereby minimizing crack generation, and a module capable of withstanding voltages of 600 V or more.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thermal oxidation method is used to form insulation layer on trench surface, then insulation layer is formed, but stress accumulates and causes substrate cracks
Solution Approach 1:
The patent changes the formation method parameter from thermal oxidation to CVD method, which forms the insulation layer with different stress characteristics. This parameter change allows the insulation layer to be formed without generating excessive outward stress at trench tip ends, thereby preventing substrate cracks while maintaining the insulating function.
2Reliability
If insulation layer thickness is increased to prevent cracks, then stress accumulation is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent optimizes the thickness parameters of the insulation layer and electrode layers within specific ranges. By controlling the insulation layer thickness to be greater than the electrode layer thickness, the design achieves crack resistance without excessive complexity, as the thickness relationship provides a clear manufacturing guideline.
3Adaptability or versatility
If multiple electrodes are formed on insulation layer, then capacitor function is achieved, but stress accumulation increases leading to cracks
Solution Approach 1:
The patent controls the thickness parameters of multiple electrode layers relative to the insulation layer. By ensuring that each electrode layer is thinner than the insulation layer, the design achieves the multi-electrode capacitor structure while limiting stress accumulation that would cause substrate cracks.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces the likelihood of substrate cracks during manufacturing and supports high voltage applications without crack formation, enhancing the mechanical strength and reliability of semiconductor devices and modules.
Implementation Method 1
the insulation layer is formed by the thermal oxidation method or the CVD method as disclosed in Japanese Patent Application Laid-Open No. 08-88321. In the case of the thermal oxidation method, since a thermal oxide film grows so as to expand from the surface of the groove
Implementation Method 2
the insulation layer is formed by the thermal oxidation method or the CVD method as disclosed in Japanese Patent Application Laid-Open No. 08-88321
Data Source
AI summary
A semiconductor device that includes a semiconductor substrate having a first main surface and a second main surface that face each other in a thickness direction, the first main surface containing a trench; an insulation layer on a surface of the trench; a first electrode layer on the insulation layer; a first dielectric layer on the first electrode layer; and a second electrode layer on the first dielectric layer, in which a thickness (L1) of the insulation layer, a thickness (L2) of the first electrode layer, and a thickness (L4) of the second electrode layer satisfy L1>L2>L4.