Semiconductor Trench Layout for Channel Current Suppression

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Solution Overview

Problem

In semiconductor devices like Schottky barrier diodes, channel currents increase reverse current, necessitating a channel stopper, which complicates manufacturing and may result in uneven structures, making accurate channel current suppression challenging.

Innovation Solution

A semiconductor device design featuring an epitaxial layer with an insulating film, an active portion with a trench, and a channel current suppression portion with a trench and an EQR electrode, allowing for simultaneous trench formation without increasing manufacturing processes and ensuring accurate channel current suppression.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a channel stopper is provided to prevent channel current, then channel current suppression is improved, but the number of manufacturing processes increases and cost increases

Engineering Contradiction:
Improvechannel current suppressionVSAvoidnumber of manufacturing processes
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the channel stopper formation with the existing active region trench formation process. The channel stopper is formed in the same trench as the active region, eliminating the need for separate manufacturing processes while maintaining effective channel current suppression.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The trench structure serves multiple functions: it acts as both the active region definition and the channel stopper formation location. This multi-functional approach allows a single process to achieve both active region isolation and channel current suppression.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If a channel stopper is provided to prevent channel current, then channel current suppression is improved, but manufacturing precision decreases due to process influences

Engineering Contradiction:
Improvechannel current suppressionVSAvoidchannel current suppression structure accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

By merging the channel stopper formation with the active region trench formation, the patent eliminates additional implant or diffusion processes that could cause structural unevenness. The single-process approach ensures more uniform and precise channel stopper formation.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If a channel stopper is provided to prevent channel current, then channel current suppression is improved, but manufacturing cost increases

Engineering Contradiction:
Improvechannel current suppressionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges the channel stopper formation with the existing active region trench process, eliminating the need for additional manufacturing steps. This integration reduces manufacturing complexity and associated costs while maintaining effective channel current suppression.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250063747A1Semiconductor device
Publication Date: 2025.02.20 SHINDENGEN ELECTRIC MANUFACTURING CO LTD
  • US20250063747A1 patent drawing
  • US20250063747A1 patent drawing
  • US20250063747A1 patent drawing

AI summary

[Problem] To provide a semiconductor device capable of suppressing a channel current without increasing manufacturing processes, and capable of accurately forming a channel current suppression structure. [Solution] A semiconductor device 1 according to the present invention includes: a substrate 10; an epitaxial layer 20 formed on the substrate 10; and an insulating film 35 provided on one surface 20a side of the epitaxial layer 20. An active portion 40 provided with a predetermined element and a channel current suppression portion 50 being at a termination portion 70 side and provided outside the active portion 40 are provided on the one surface 20a side of the epitaxial layer 20 via the insulating layer 35. The channel current suppression portion 50 is provided with a trench 51 for suppressing the channel current flowing from the active portion 40 to the termination portion 70.