Semiconductor Device Trench Contact Latch-Up Suppression

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Solution Overview

Problem

Semiconductor devices face challenges in suppressing latch-up, a phenomenon that can lead to device failure, particularly due to the interaction between the emitter region and contact region in the semiconductor substrate.

Innovation Solution

The semiconductor device incorporates a trench contact portion and a plug contact region with specific doping concentrations and structures to enhance carrier injection and reduce the likelihood of latch-up, including a trench contact portion that penetrates through the emitter region and a plug contact region with higher doping concentrations, which helps in concentrating carrier flow and reducing the occurrence of latch-up.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional semiconductor structure with emitter region and contact region is used, then the device can operate, but latch-up occurs leading to device failure

Engineering Contradiction:
Improvelatch-up suppressionVSAvoidlatch-up phenomenon
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The contact region is divided into two distinct parts: a first contact region formed at a shallower depth and a second contact region formed at a greater depth. This segmentation allows independent optimization of each contact region's properties, enabling the shallower first contact region to provide good electrical contact while the deeper second contact region suppresses latch-up by being positioned away from the high-field emission region.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the contact structure are given different properties: the first contact region has higher doping concentration for low contact resistance, while the second contact region has lower doping concentration and greater depth for latch-up suppression. This local differentiation of properties allows each region to perform its specific function optimally without compromising the other.

Inventive Principle:
Principle #3Local quality

2Productivity

If the contact region is positioned closer to the emitter region to improve carrier injection, then carrier injection is enhanced, but latch-up becomes more likely to occur

Engineering Contradiction:
Improvecarrier injection efficiencyVSAvoidlatch-up suppression
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Instead of only adjusting the horizontal position of the contact region, the invention utilizes the vertical dimension by forming a second contact region at a greater depth than the first contact region. This depth differentiation allows the contact structure to achieve both good carrier injection (through the shallower first contact region) and latch-up suppression (through the deeper second contact region) simultaneously.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The contact region is segmented into two parts at different depths, with the first contact region optimized for carrier injection and the second contact region optimized for latch-up suppression. This segmentation in the depth dimension resolves the contradiction between improving carrier injection and suppressing latch-up.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20230207674A1Semiconductor device and method of manufacturing the same
Publication Date: 2023.06.29 FUJI ELECTRIC CO LTD
  • US20230207674A1 patent drawing
  • US20230207674A1 patent drawing
  • US20230207674A1 patent drawing

AI summary

Provided is a semiconductor device including: a drift region of a first conductivity type provided in a semiconductor substrate; a base region of a second conductivity type provided above the drift region; an emitter region of a first conductivity type provided above the base region; a second conductivity type region provided above the drift region; a plurality of trench portions extending in a predetermined extending direction; and an interlayer dielectric film provided above the semiconductor substrate and includes a first contact hole portion and second contact hole portion, in which the second conductivity type region and the emitter region are provided alternately in the extending direction, the first contact hole portion is provided alternately with the second contact hole portion in the extending direction, and a lower end of the first contact hole portion is provided at a different depth from a lower end of the second contact hole portion.