Semiconductor Device Trench Structure for Current Control
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Solution Overview
Problem
Conventional semiconductor devices with ultra-thin channels face challenges in maintaining control over channel current due to leakage and performance instability, particularly in fin field effect transistors, where alignment deviations and size differences in trench structures affect the consistency and stability of source and drain doped regions.
Innovation Solution
A method involving the formation of a semiconductor device with a substrate, source and drain material layers, and a mask layer that includes a first trench, with a protective layer on sidewalls to define a second trench, allowing for the conformal deposition of a channel material layer and gate structure on both trenches, ensuring consistent source and drain material layer sizes and improved electrical stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional ultra-thin channel structures are used, then device scaling is achieved, but control over channel current deteriorates due to leakage and performance instability
Solution Approach 1:
The patent divides the channel structure into multiple segments by forming separate first and second trenches at different locations, with channel material layers formed in each trench. This segmentation allows independent optimization of each channel region and improves overall control over channel current while maintaining device scaling.
Solution Approach 2:
The patent applies local quality by forming protective layers selectively on sidewalls of trenches, and by creating different trench configurations (first trench with protective layer, second trench without) to optimize specific regions. This allows tailored control of channel properties in different locations to improve current control and reduce leakage.
2Reliability
If fin field effect transistor structures are used, then control capability is improved, but alignment deviations and size differences in trench structures cause inconsistency in source and drain doped regions
Solution Approach 1:
The patent performs preliminary action by forming protective layers on sidewalls of trenches before etching the trenches. This preliminary protection ensures uniform trench width and prevents alignment deviations during subsequent processing steps, thereby improving manufacturing precision and consistency of source and drain doped regions.
Solution Approach 2:
The protective layer acts as an intermediary element between the trench formation process and the final device structure. It maintains trench dimensional stability during processing, serves as a reference for subsequent alignment steps, and ensures consistent spacing between trenches, thereby improving overall manufacturing precision.
3Reliability
If multiple trenches are formed to improve channel control, then device performance is enhanced, but process complexity increases
Solution Approach 1:
The patent merges multiple process steps by forming both first and second trenches using the same mask layer and protective layer structures. Channel material layers are deposited simultaneously in both trenches, and the gate structure is formed in a unified process, thereby reducing overall process complexity despite the enhanced device performance from multiple channels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the stability and performance of semiconductor devices by ensuring consistent sizes of source and drain material layers and doped regions, thereby improving the control over channel current and reducing the short channel effect.
Implementation Method 1
forming a protective layer on sidewalls of the first trench
Implementation Method 2
forming a channel material layer and a gate structure on the channel material layer after the protective layer is removed, and the channel material layer is on the sidewalls and the bottom of the first trench and on sidewalls and bottom of the second trench
Data Source
AI summary
Semiconductor devices and fabrication methods are provided. A semiconductor device includes a substrate, a source and drain material layer formed on the substrate. The source and drain material layer contains a first trench there-through. The semiconductor device further includes a mask layer formed on the source and drain material layer containing a second trench there-through. The second trench has a cross-section area larger than the first trench and covers the first trench. The semiconductor device further includes a channel material layer conformally formed on a bottom and sidewalls of each of the first trench and the second trench and a gate structure conformally formed on the channel material layer, on the bottom and the sidewalls of each of the first trench and the second trench. The gate structure has a recess and the recess has a symmetrical step structure.