Semiconductor Trench Gap Fill With Void-Free SiCN Deposition
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Solution Overview
Problem
The scaling down of semiconductor integrated circuits (ICs) has increased processing complexity and the challenge of forming void-free and seam-free gap-fill materials in high aspect ratio trenches during the fabrication of advanced transistor structures.
Innovation Solution
A bottom-up deposition process using precursors such as azidosilane or halide azidosilane, which undergo a Curtius-type rearrangement to form silicon carbon nitride (SiCN) oligomers, is employed to fill trenches, followed by UV curing and optional nitrogen plasma treatment to ensure void-free and seam-free gap-fill materials, and an UV-assisted ALD process for forming ultrathin liner structures without pin-holes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional deposition processes are used to fill high aspect ratio trenches, then the trenches can be filled with gap-fill material, but voids and seams form in the filled material
Solution Approach 1:
The patent changes the chemical parameters of the deposition process by using precursors that undergo Curtius-type rearrangement to form silicon carbon nitride oligomers. This chemical transformation enables the formation of void-free and seam-free gap-fill materials in high aspect ratio trenches, resolving the contradiction between fillability and material quality.
Solution Approach 2:
The patent replaces conventional physical deposition mechanisms with a chemical reaction-based deposition process. The Curtius-type rearrangement of azidosilane or halide azidosilane precursors creates a chemical transformation that deposits material without forming voids or seams, substituting mechanical deposition with chemical synthesis.
2Reliability
If trench filling is performed to provide insulation and isolation, then device performance improves, but metal penetration and diffusion can occur through defects
Solution Approach 1:
The patent uses ultrathin liner structures formed by UV-assisted ALD as a sacrificial protective layer. This thin liner provides sufficient protection against metal penetration and diffusion while allowing the subsequent gap-fill material to provide bulk insulation. The liner can be considered a disposable protective element that prevents harmful metal interaction.
Solution Approach 2:
The patent creates a composite structure consisting of an ultrathin liner layer (formed by UV-assisted ALD) combined with silicon carbon nitride gap-fill material. This composite provides both the barrier function against metal penetration through the liner and the insulation function through the gap-fill material, resolving the contradiction between protection and isolation quality.
3Productivity
If geometry size is scaled down to increase functional density, then production efficiency improves, but processing complexity increases
Solution Approach 1:
The patent performs preliminary actions by forming ultrathin liner structures on trench walls before filling the trenches with gap-fill material. This preliminary liner formation simplifies the overall processing by preventing defects during subsequent steps and ensuring proper material deposition, thereby reducing processing complexity despite scaled-down geometry.
Solution Approach 2:
The patent introduces an intermediary ultrathin liner structure that mediates between the trench walls and the gap-fill material. This intermediary layer facilitates the scaling down process by ensuring defect-free material deposition and providing a controlled interface, thereby reducing processing complexity associated with miniaturization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves void-free and seam-free gap-fill materials and ultrathin liner structures, enhancing device performance and yield by preventing metal penetration and diffusion, and providing better insulation and isolation in semiconductor devices.
Implementation Method 1
A bottom-up deposition process using precursors such as azidosilane or halide azidosilane, which undergo a Curtius-type rearrangement to form silicon carbon nitride (SiCN) oligomers
Implementation Method 2
followed by UV curing and optional nitrogen plasma treatment to ensure void-free and seam-free gap-fill materials
Implementation Method 3
followed by UV curing and optional nitrogen plasma treatment to ensure void-free and seam-free gap-fill materials
Implementation Method 4
an UV-assisted ALD process for forming ultrathin liner structures without pin-holes
Data Source
AI summary
A method for forming a semiconductor structure includes the following steps. A semiconductor device is formed over a substrate. A trench is formed in the semiconductor device. The trench is filled with a gap-fill material using a deposition process, wherein a precursor used in the deposition process includes azidosilane, di-azidosilane or halide azidosilane.