Semiconductor Device Trench Isolation via Gate Metal Reference

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Solution Overview

Problem

In semiconductor device manufacturing, existing methods face challenges in effectively forming trenches between transistors to achieve electrical isolation while maintaining the structural integrity and electrical properties of the transistors.

Innovation Solution

A method involving the formation of vertical structures, source/drain regions, and insulating layers, followed by the removal of substrate portions and gate metal between these structures to create trenches, which are then filled with insulating material to isolate adjacent transistors, ensuring electrical separation and maintaining the integrity of the transistor channels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If trenches are formed by forming a recess on the substrate and filling insulating material, then electrical isolation between transistors is achieved, but the structural integrity and electrical properties of transistors may be compromised

Engineering Contradiction:
Improveelectrical isolationVSAvoidstructural integrity of transistors
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The method performs preliminary actions by forming the gate metal on vertical structures before removing substrate portions to create trenches. This sequence ensures that the gate metal is already in place and can guide the trench formation process, preventing damage to the gate structure and maintaining transistor integrity while achieving electrical isolation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The substrate is segmented by removing portions between vertical structures to form trenches. This segmentation approach creates clear electrical isolation between adjacent transistors while preserving the structural integrity of each transistor by confining the removal to specific regions between structures.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If trenches are formed before gate metal formation, then the manufacturing process is simplified, but the gate metal and insulating layer removal becomes complex and time-consuming

Engineering Contradiction:
Improveprocess simplicityVSAvoidgate metal removal time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The method inverts the conventional sequence by forming trenches after gate metal formation rather than before. This inversion allows the gate metal to serve as a reference structure during trench formation, simplifying the overall process by eliminating the need for separate gate metal removal steps and reducing manufacturing time.

Inventive Principle:
Principle #13The other way round (Inversion)

3Reliability

If trenches are formed after gate metal formation, then electrical isolation is improved, but the manufacturing process complexity increases

Engineering Contradiction:
Improveelectrical isolation qualityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The method merges multiple operations into a unified process sequence. By forming gate metal on vertical structures and then using those structures as guides for trench formation, the process combines gate fabrication and trench creation into an integrated workflow, reducing overall process complexity while improving electrical isolation quality.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10804160B2Semiconductor device and method of manufacturing the same
Publication Date: 2020.10.13 SAMSUNG ELECTRONICS CO LTD
  • US10804160B2 patent drawing
  • US10804160B2 patent drawing
  • US10804160B2 patent drawing

AI summary

A method for manufacturing a semiconductor device is provided. A first vertical structure and a second vertical structure are formed on a substrate. The second vertical structure is positioned right next to the first vertical structure. The second vertical structure is positioned right next to the first vertical structure. An insulating layer is formed on the substrate between the first and second vertical structures. A gate metal and a gate dielectric layer, are formed on the first and second vertical structures. A portion of the gate metal, gate dielectric layer, and insulating layer is removed. A portion of the substrate is removed. The portion of the substrate is removed after the gate metal is formed on the first and second vertical structure.