Semiconductor Package Trench Ring Prevents Passivation Delamination

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Solution Overview

Problem

The existing semiconductor device package structures face delamination issues during testing due to deviations in process conditions, where the external passivation layer edge may retract inward and fall on the uneven inner seal ring, leading to failure in withstanding testing stress.

Innovation Solution

A semiconductor device package structure is proposed, featuring a substrate with a circuit structure defined by scribe lines, a seal ring surrounding the circuit, and a trench ring between the seal ring and scribe lines, with the packaging passivation cap layer designed to cover at least the trench ring and extend outward from its outer side wall by a predetermined distance to prevent delamination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the packaging passivation cap layer is designed to cover only up to the inner seal ring, then the manufacturing cost and process complexity are reduced, but delamination occurs at the edge of the inner seal ring during testing due to process condition deviations

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidpassivation layer adhesion
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces a trench ring as an intermediary structure between the inner seal ring and the scribe line. This trench ring serves as a buffer zone that prevents the passivation layer edge from directly contacting the uneven inner seal ring surface, thereby eliminating the delamination issue while maintaining a straightforward manufacturing process

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The trench ring is formed in advance during the fabrication process, before the passivation layer is applied. This preliminary action creates a pre-prepared buffer zone that ensures the passivation layer will not delamine during subsequent testing, even if process conditions deviate

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the passivation layer edge extends beyond the inner seal ring to cover the trench ring, then delamination is prevented, but the device complexity and fabrication precision requirements increase

Engineering Contradiction:
Improvepassivation layer adhesionVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the protective structure into distinct functional zones: the inner seal ring for moisture protection, the trench ring as a buffer zone, and the passivation layer for external protection. This segmentation allows each component to perform its specific function without compromising the others, preventing delamination while maintaining structural clarity

Inventive Principle:
Principle #1Segmentation

3Quantity of substance

If the passivation layer edge precisely aligns with the inner seal ring, then material usage is minimized, but any process deviation causes the edge to retract and fall on the uneven seal ring surface causing delamination

Engineering Contradiction:
Improvepassivation layer materialVSAvoidpassivation layer edge positioning
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The trench ring acts as a cushioning zone that absorbs the impact of process variations. By designing the passivation layer to extend onto this cushioning zone rather than precisely aligning with the inner seal ring, the system tolerates process deviations without causing delamination, eliminating the need for extreme manufacturing precision

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS11495510B2Semiconductor device package structure and method for fabricating the same
Publication Date: 2022.11.08 UNITED MICROELECTRONICS CORP
  • US11495510B2 patent drawing
  • US11495510B2 patent drawing
  • US11495510B2 patent drawing

AI summary

A semiconductor device package structure includes a substrate. The substrate has a circuit structure formed in a die region. The die region is defined by a plurality of scribe lines configured on the substrate. A seal ring is disposed in the substrate and located at a periphery region of the die region, and surrounds at least a portion of the circuit structure. A trench ring is disposed in the substrate between the seal ring and the scribe lines. A packaging passivation cap layer covers over the circuit structure and the seal ring, and covers at least the trench ring.