Semiconductor Package Shallow Trench I/O Bump Formation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor packaging technologies face challenges in achieving smaller pitch I/O bumps with constant manufacturing costs, due to issues with critical dimension uniformity and overlay shift, leading to delamination and increased area enclosures.
Innovation Solution
The implementation of a semiconductor package with a shallow trench in the polymer layer, featuring a tapered sidewall and a seed layer between the trench and the I/O bump, allows for the formation of smaller pitch I/O bumps with improved critical dimension uniformity and reduced overlay shift, enabling smaller area enclosures and enhanced solder-I/O bump joint strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional packaging technologies are used, then manufacturing process is simpler, but critical dimension uniformity deteriorates and overlay shift increases
Solution Approach 1:
The packaging structure is segmented into distinct functional layers: a polymer layer for mechanical support, a shallow trench for precision positioning, and a seed layer for controlled metallization. This segmentation allows each layer to optimize its specific function, with the trench providing dimensional stability and the seed layer enabling precise bump formation, thereby improving critical dimension uniformity without overwhelming complexity.
Solution Approach 2:
The invention transitions from planar I/O bump formation to a three-dimensional structure with a shallow trench. By adding the vertical dimension of the trench with tapered sidewalls, the patent achieves better overlay alignment and critical dimension control, as the trench walls provide physical constraints that reduce lateral shifts during subsequent processing steps.
2Area of moving object
If smaller pitch I/O bumps are manufactured, then area enclosure is reduced, but manufacturing errors increase and costs increase
Solution Approach 1:
The seed layer acts as an intermediary between the trench structure and the I/O bumps. This intermediate layer provides a controlled interface that enables precise metallization deposition, ensuring that even at smaller pitches, the bumps form with accurate dimensions and positioning. The seed layer mediates the transition from the structural trench to the functional bump, reducing manufacturing errors.
Solution Approach 2:
The shallow trench with tapered sidewalls is formed preliminarily before I/O bump deposition. This preliminary structure establishes precise geometric constraints that guide subsequent metallization processes, ensuring that even when manufacturing smaller pitch bumps, the critical dimensions remain uniform and overlay shifts are minimized, thereby reducing manufacturing errors.
3Area of moving object
If smaller pitch I/O bumps are formed, then area enclosure is reduced, but manufacturing costs increase
Solution Approach 1:
The shallow trench structure serves multiple functions simultaneously: it provides mechanical support, establishes alignment references for overlay, controls critical dimensions through its tapered geometry, and facilitates seed layer deposition. This multi-functionality reduces the need for additional specialized process steps, thereby controlling manufacturing costs even when producing smaller pitch bumps with higher precision requirements.
4Productivity
If conventional packaging structures are used, then device density is lower, but joint strength is sufficient
Solution Approach 1:
The packaging structure employs a composite approach combining the polymer layer for mechanical support and encapsulation, the trench structure for precision positioning, and the metallized seed layer for electrical connection and bonding. This composite structure achieves both high device density through smaller pitch bumps and adequate joint strength through the optimized multi-layer configuration, where each material contributes its superior properties to the overall system.
Data Source
AI summary
The present disclosure provides a semiconductor package, including a substrate, a semiconductor die, and a conductive bump. The substrate has a first surface and a second surface opposite to the first surface. The substrate further includes a conductive line surrounded by a dielectric, and a conductive via connected to the conductive line and protruding from the dielectric at the second surface. The semiconductor die is connected to the first surface of the substrate. The conductive bump is connected to the conductive via at the second surface.