Semiconductor Trench Density via Self-Aligned Sidewall Spacers
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Solution Overview
Problem
Conventional photolithography techniques have reached their theoretical limitations in resolution, making it difficult to achieve high-density and small-sized through holes or trenches for semiconductor devices, leading to complex photo mask fabrication and high manufacturing costs.
Innovation Solution
A self-aligned double patterning process is used, where pillar structures with a matrix arrangement are formed on a dielectric layer, and sidewall spacers are created to act as an etch mask, allowing for the formation of densely packed through holes or trenches without the need for high-density photo mask patterns, thereby increasing density and simplifying the fabrication process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography techniques are used to increase integration density and form nanometer-scale structures, then resolution is improved, but the theoretical resolution limit is reached and photo mask fabrication becomes more complex and difficult
Solution Approach 1:
The patent divides the pattern formation process into multiple stages: first forming a mandrel pattern, then using sidewall spacers to create additional patterns. This segmentation allows achieving higher density patterns without requiring increasingly complex photo masks, as the complexity is distributed across multiple simpler fabrication steps
Solution Approach 2:
The patent transitions from two-dimensional photo mask patterning to three-dimensional structure utilization by forming sidewall spacers on the vertical sidewalls of mandrels. This dimensional transition enables pattern multiplication without increasing photo mask complexity, as the additional patterns are generated in the vertical dimension through conformal deposition
2Quantity of substance
If photo mask patterns are made smaller to increase through hole or trench density, then integration density is improved, but photo mask fabrication becomes more complex and difficult
Solution Approach 1:
The sidewall spacers are formed through self-aligned conformal deposition on the mandrel sidewalls, automatically positioning themselves without requiring additional alignment steps or complex photo mask patterns. This self-service mechanism enables high-density pattern formation while maintaining simple photo mask fabrication
Solution Approach 2:
The patent changes the critical dimension control parameter from photo mask feature size to sidewall spacer thickness, which is controlled by conformal deposition parameters rather than photolithography resolution. This parameter change enables density scaling without the same constraints on photo mask fabrication
3Quantity of substance
If double-patterning processes like LELE or LLE are used to overcome resolution limitations, then through hole or trench density is improved, but process complexity and manufacturing cost increase
Solution Approach 1:
The patent merges the mandrel formation and spacer formation into a unified self-aligned process where the spacer automatically conforms to the mandrel sidewall. This merging eliminates the need for separate alignment steps required in traditional double-patterning processes, reducing overall process complexity while achieving the same pattern multiplication effect
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the density of through holes or trenches by up to 98.1% while reducing the complexity and cost of photo mask fabrication and eliminating via-to-via overlay issues, enabling more efficient semiconductor device manufacturing.
Implementation Method 1
a plurality of sidewall spacers can be formed on the dielectric layer. Each sidewall spacer of the plurality of sidewall spacers can be formed on a sidewall surface of one of the plurality of pillar structures
Implementation Method 2
The dielectric layer can be etched using the plurality of sidewall spacers as an etch mask to form a plurality of trenches or through holes in the dielectric layer
Data Source
AI summary
Various embodiments provide semiconductor devices and fabrication methods. In an exemplary method, a dielectric layer can be formed on a semiconductor substrate. A plurality of pillar structures having a matrix arrangement can be formed on the dielectric layer. A plurality of sidewall spacers can be formed on the dielectric layer. Each sidewall spacer can be formed on a sidewall surface of one of the plurality of pillar structures. A distance between adjacent pillar structures in a same row or in a same column can be less than or equal to a double of a thickness of the each sidewall spacer on the sidewall surface. The plurality of pillar structures can be removed. The dielectric layer can be etched using the plurality of sidewall spacers as an etch mask to form a plurality of trenches or through holes in the dielectric layer.