Semiconductor Trench Formation via Spacer Layer Etching

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Solution Overview

Problem

The manufacturing of semiconductor structures faces challenges in controlling critical dimensions of active areas, leading to critical dimension imbalance and short circuits, which decrease the quality and yield of semiconductor devices.

Innovation Solution

A method involving the formation of a buffer layer, a first top hard mask with a trench, and a spacer layer to create a second trench, followed by etching processes to form a patterned top hard mask and a third trench in the substrate, ensuring consistent critical dimensions and preventing short circuits between active areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the pitch of active areas and size of isolation structure are decreased to increase circuit density, then the efficiency and density of integrated circuit are improved, but the critical dimension control of active areas becomes difficult and critical dimension imbalance occurs

Engineering Contradiction:
Improvecircuit densityVSAvoidcritical dimension control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent segments the trench formation process into multiple stages: first forming a shallow first trench with a first hard mask, then forming a spacer layer, and finally forming a deeper second trench. This segmentation allows independent optimization of each etching step, improving critical dimension control while achieving the required total trench depth for high-density circuits

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a vertical spacer layer that extends in the depth dimension, transforming the problem from a single-depth etch to a multi-depth sequential etch. The spacer layer's thickness controls the depth of the second trench, enabling precise dimensional control in the vertical dimension while maintaining high horizontal density

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If the pitch of active areas is decreased to increase circuit density, then the productivity is improved, but short circuits may occur between active areas

Engineering Contradiction:
Improvecircuit densityVSAvoidshort circuit prevention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary actions by first forming the buffer layer and first hard mask, then creating the first shallow trench to establish initial isolation. The spacer layer is formed in advance to define the precise location and depth of the second trench, ensuring proper isolation before final active area formation, thus preventing short circuits in high-density configurations

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If a multi-step trench formation process is used to improve critical dimension control, then the manufacturing precision is improved, but the process complexity increases

Engineering Contradiction:
Improvecritical dimension controlVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The spacer layer serves multiple functions automatically: it defines the depth of the second trench, provides lateral confinement for the etch process, and establishes the isolation structure geometry. This self-service approach reduces the need for additional separate process steps, managing complexity while maintaining high manufacturing precision

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method ensures consistent critical dimensions and prevents short circuits between active areas, thereby improving the quality and yield of semiconductor devices by maintaining precise control over the semiconductor structure.

Implementation Method 1

The top portion and the bottom portion are etched to form a thinned top portion and a thinned bottom portion by performing a dry etching process

Methodology Applied
Scientific EffectDry etching:

Data Source

PatentUS11289366B1Method of manufacturing semiconductor structure
Publication Date: 2022.03.29 NAN YA TECH
  • US11289366B1 patent drawing
  • US11289366B1 patent drawing
  • US11289366B1 patent drawing

AI summary

A method of manufacturing a semiconductor structure includes the following operations. A buffer layer is formed over a substrate. A first top hard mask is formed on the buffer layer, in which the first top hard mask has a first trench to expose a first portion of the buffer layer. A spacer layer is formed to cover a sidewall of the first trench and an upper surface of the first top hard mask and the first portion of the buffer layer to form a second trench over the first portion. The top portion and the bottom portion are etched to form a thinned top portion and a thinned bottom portion. A second top hard mask is formed in the second trench. The thinned top portion and the vertical portion of the spacer layer are removed.