Semiconductor Trench Layout for Lower Switching Loss
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Solution Overview
Problem
In semiconductor devices with a GGEE structure, the resistance of the inversion layer causes a deficiency of electrons in the separation region, leading to increased switching loss and voltage tail in high-voltage applications.
Innovation Solution
The semiconductor device incorporates an impurity region formed at a position in contact with the trenches in the separation region, reducing the diffusion layer resistance and enhancing electron supply to the separation region, thereby reducing switching loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the width of the emitter formation region is reduced and the width of the separation region is increased to reduce channel density, then the load short-circuit tolerance is improved, but the resistance of the inversion layer increases causing electron deficiency and increased switching loss
Solution Approach 1:
The patent applies local quality by forming a low-concentration base region specifically in the separation region, while maintaining normal base region characteristics in the emitter formation regions. This localized modification reduces the inversion layer resistance in the separation region without affecting the channel density control achieved by the emitter formation region width adjustment, thereby resolving the contradiction between improved short-circuit tolerance and reduced switching loss.
2Reliability
If the width of the emitter formation region is reduced to reduce channel density, then the load short-circuit tolerance is improved, but the resistance of the inversion layer causes voltage tail in the forward voltage waveform
Solution Approach 1:
The patent introduces a low-concentration base region specifically in the separation region, creating a localized modification that reduces inversion layer resistance where it causes voltage tail. This local quality change addresses the voltage tail issue without requiring changes to the overall channel density or emitter formation region dimensions, thus maintaining the improved short-circuit tolerance while eliminating the harmful voltage tail effect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces switching loss by approximately 21% compared to previous designs, improving the overall performance of the semiconductor device.
Implementation Method 1
The semiconductor device incorporates an impurity region formed at a position in contact with the trenches in the separation region, reducing the diffusion layer resistance and enhancing electron supply to the separation region
Data Source
AI summary
A semiconductor substrate includes a plurality of emitter formation regions separated from each other in a Y direction between a pair of trenches, and a separation region located between the emitter formation regions. A p-type base region is formed in the semiconductor substrate of each of the emitter formation regions and the separation region. An n-type impurity region is formed in the base region of each emitter formation region. The impurity region is also formed in the base region at a position in contact with the pair of trenches in the separation region.