Semiconductor Package Trench Structure for Underfill Overflow Containment

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Solution Overview

Problem

In integrated circuit packaging, underfill materials used to secure connections between integrated passive devices (IPDs) and underlying structures often overflow into keep-out zones, covering adjacent connectors and requiring additional operations for removal, which complicates the packaging process and can lead to contamination risks.

Innovation Solution

Incorporating a trench in the semiconductor package structure to accommodate overflowing underfill materials, thereby preventing them from reaching sensitive connectors and reducing the need for additional removal operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If underfill materials are used to secure connections between IPDs and underlying structures, then connection reliability is improved, but underfill overflow into keep-out zones occurs covering adjacent connectors

Engineering Contradiction:

Improveconnection reliabilityVSAvoidunderfill overflow contamination

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the problematic overflowed underfill material from the keep-out zone by introducing a removal operation step. This directly addresses the contamination issue by separating the harmful overflowed material from the sensitive connectors through active removal processes

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary structure (such as a barrier layer or modified keep-out zone design) that mediates between the underfill material and the connectors. This intermediary prevents direct contact between the overflowed underfill and the connectors, reducing contamination risks while maintaining connection reliability

Inventive Principle:

Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If additional operations are performed to remove overflowed underfill materials, then contamination risks are reduced, but manufacturing process complexity increases

Engineering Contradiction:

Improvecontamination risksVSAvoidmanufacturing process complexity

Core Design Contradiction:

Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent performs preliminary actions by designing the keep-out zone and underfill application parameters beforehand to minimize overflow. By pre-configuring the system with appropriate barriers and controlling underfill viscosity/application rate, the need for extensive removal operations is reduced before the problem fully manifests

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent changes material parameters (such as underfill viscosity, cure rate, or composition) and process parameters (such as application temperature, pressure, or speed) to control underfill flow behavior. By optimizing these parameters, the underfill is made less prone to overflowing into keep-out zones, reducing both contamination and the need for complex removal operations

Inventive Principle:

Principle #35Parameter changes

3Power

If keep-out zone size is reduced to improve power distribution network performance, then current handling capability is improved, but underfill overflow into connectors becomes more likely

Engineering Contradiction:

Improvecurrent handling capabilityVSAvoidunderfill overflow risk

Core Design Contradiction:

PowerVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary barrier structure between the underfill material and the connectors in the reduced keep-out zone. This barrier (such as a conformal coating or protective layer) allows the keep-out zone to be minimized for power distribution performance while the intermediary prevents underfill from directly contacting the connectors, thus enabling both small keep-out zones and high current handling capability

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS20240363576A1Semiconductor package structure and method for forming the same

Publication Date: 2024.10.31 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor package structure includes a semiconductor die encapsulated in a molding compound, a redistribution structure over the semiconductor die and the molding compound, a surface device over and electrically connected to the redistribution structure, a first connector over and electrically connected to the redistribution structure, a second connector between the surface device and the redistribution structure, a trench in the redistribution structure and laterally surrounding the surface device in a top view of the semiconductor package structure, and an underfill. The second connector electrically connects the surface device to the redistribution structure. The underfill surrounds the second connector. The underfill include a first portion and a second portion. The first portion of the underfill is located between the surface device and the redistribution structure and laterally surrounding the second connector, and the second portion of the underfill is disposed in the trench.