Semiconductor Device Triple RESURF Breakdown Voltage
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Solution Overview
Problem
Conventional N-type lateral double diffused metal oxide semiconductor transistors (LDMOS) have limited breakdown voltage, typically restricted to 20 V or less, and methods to increase this voltage, such as forming epitaxial and buried layers, are costly and not applicable to all applications.
Innovation Solution
A semiconductor device design that includes a source region, a first body region surrounding the source, a deep well region, and a second body region with different conductivity types and impurity concentrations, where the second body region is shallower and has a buried layer, allowing increased breakdown voltage without additional manufacturing steps or costly epitaxial and buried layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional N-type LDMOS structure is used, then manufacturing is simple, but breakdown voltage is restricted to 20 V or less
Solution Approach 1:
The device is segmented into multiple body regions (first body region and second body region) with different conductivity types and impurity concentrations. This segmentation allows the first body region to provide low on-resistance while the second body region provides high breakdown voltage, resolving the contradiction between simple structure and high performance.
Solution Approach 2:
Different regions of the device are given different local properties: the first body region has higher impurity concentration for low resistance, while the second body region has lower impurity concentration for high breakdown voltage. This local differentiation enables the device to achieve both low on-resistance and high breakdown voltage without complex additional structures.
2Reliability
If epitaxial layer and buried layer are formed to increase breakdown voltage, then breakdown voltage can reach 100 V or greater, but manufacturing cost increases
Solution Approach 1:
The invention merges the functions of the first body region and second body region into a single continuous body region with a gradual impurity concentration gradient. This combination achieves the high breakdown voltage of 100 V or greater without requiring separate epitaxial layers or buried layers, thereby reducing manufacturing cost while maintaining high reliability.
3Reliability
If thick epitaxial layer and buried layer are formed to fully isolate body region, then breakdown voltage increases, but unit price increases significantly
Solution Approach 1:
The invention extracts and eliminates the need for thick epitaxial layers and buried layers by using a novel body region structure with different conductivity types and impurity concentrations. This extraction achieves full isolation of the body region from the substrate while maintaining cost-effectiveness, as the isolation is achieved through the doping profile rather than additional physical layers.
4Reliability
If expanded deep well or N-diffusion region is formed to surround body region, then breakdown voltage increases by certain level, but manufacturing cost increases due to additional steps
Solution Approach 1:
The body region serves multiple functions simultaneously: it provides the main current conduction path, provides isolation from the substrate through its different conductivity type, and achieves high breakdown voltage through its impurity concentration gradient. This multi-functionality eliminates the need for separate expanded deep wells or N-diffusion regions, reducing manufacturing complexity while achieving the desired breakdown voltage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively increases breakdown voltage to above 100 V while maintaining cost-effectiveness and applicability across various applications by forming a semiconductor device with a triple RESURF structure, reducing on-resistance, and minimizing body effect.
Implementation Method 1
The deep well region may have an impurity concentration that is different from an impurity concentration of the second body region. The second body region may have an impurity concentration that is lower than an impurity concentration of the deep well region.
Implementation Method 2
a semiconductor device includes a source region disposed apart from a drain region, a first body region surrounding the source region, a deep well region disposed below the drain region
Data Source
AI summary
There are provided a semiconductor device and a method of manufacturing the same. The semiconductor device includes a source region disposed apart from a drain region, a first body region surrounding the source region, a deep well region disposed below the drain region, and a second body region disposed below the first body region. A bottom surface of the second body region is not coplanar with a bottom surface of the deep well region, and the first body region has a different conductivity type from the second body region.


