Semiconductor Package With Identical Chips And Selective TSV Enable

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Solution Overview

Problem

Current semiconductor packaging technologies face challenges in high integration and production efficiency due to the need for different designs and processes for each semiconductor chip, leading to increased costs and complexity, especially with wire bonding and through-silicon vias (TSVs) where signal and chip enable pads have the same structure, limiting chip selection and integration.

Innovation Solution

A semiconductor package design where multiple chips have the same structure with through-silicon vias, allowing for the use of the same masks and production processes, and conductive lines that can be cut to selectively connect chip enable pins, enabling individual chip selection and simplifying production management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If wire bonding interconnection is used with different chip designs to control chip enable pad positions, then chip selection capability is improved, but production cost increases and processing complexity increases

Engineering Contradiction:
Improvechip selection capabilityVSAvoidprocessing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The chip enable pad is segmented from the signal pad structure. While signal pads maintain a uniform structure across all chips, chip enable pads are selectively formed only on specific chips through a separate patterning process, enabling individual chip selection without requiring different overall chip designs

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The chip enable pad positioning is determined in advance during the fabrication process through selective patterning, rather than requiring post-fabrication wire bonding adjustments. This preliminary action allows chips to be prepared with identical base structures while pre-configuring selection capability

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If through-silicon vias are used with uniform signal pad and chip enable pad structures, then manufacturing simplicity is improved, but chip selection capability deteriorates

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidchip selection capability
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

While maintaining uniform through-silicon via structures across all chips for manufacturing simplicity, the invention applies local differentiation by forming chip enable pads only on specific chips where selection functionality is needed, rather than on all chips uniformly

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system transitions from a static uniform structure to a dynamic configuration where chip enable pads can be selectively activated or deactivated on different chips through the patterning process, enabling flexible chip selection while maintaining overall structural uniformity

Inventive Principle:
Principle #15Dynamics

3Quantity of substance

If high integration is achieved by increasing cell capacity in defined space, then storage capacity is improved, but manufacturing complexity and development time increase

Engineering Contradiction:
Improvestorage capacityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The invention creates a universal chip structure that can serve multiple functions - all chips have identical signal pad through-silicon via structures for basic operation, while selected chips additionally have chip enable pads for selection functionality. This multi-functional design allows high integration without requiring complex differentiations across all chips

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7872341B1Semiconductor device
Publication Date: 2011.01.18 AMKOR TECH SINGAPORE HLDG PTE LTD
  • US7872341B1 patent drawing
  • US7872341B1 patent drawing
  • US7872341B1 patent drawing

AI summary

A semiconductor package comprises a plurality of stacked semiconductor chips having the same structure. Therefore, the semiconductor chips can be produced using masks of the same design, resulting in a reduction in production cost and an improvement in productivity. Each of the semiconductor chips includes a plurality of through-silicon vias penetrating therethrough. The through-silicon vias of each semiconductor chip include at least one signal pad through which a common signal is delivered to the semiconductor chip and at least one chip enable pad connected to at least one chip enable pin to select the semiconductor chip. The chip enable pin may be connected to or disconnected from the chip enable pad through a conductive line to select the semiconductor chip. The conductive line is sawn to disconnect the chip enable pin from the chip enable pad before stacking of the semiconductor chip. Therefore, the semiconductor chips can be configured to have the same design, thus eliminating the need for troublesome production management and control of the semiconductor chips.