Semiconductor Package Underfill Retention Barrier
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The reliability of vertically stacked semiconductor packages is compromised due to the bonding process, which can lead to reduced structural integrity and void formation during manufacturing, especially when pressure is applied.
Innovation Solution
A semiconductor package design featuring a protective structure with a first material layer, such as an adhesive film, that covers connection structures and a second material layer acting as a retention barrier, preventing the first layer from extruding and ensuring the connection structures remain within the perimeter of the semiconductor elements, thereby enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bonding is used to join semiconductor chips in a vertically stacked package, then the chips can be electrically connected and bonded together, but the reliability of the package is reduced due to void formation and structural integrity issues
Solution Approach 1:
A perimeter material layer is introduced as an intermediary substance between the bonding adhesive and the molding compound. This perimeter material layer acts as a barrier that prevents the bonding adhesive from mixing with the molding compound, thereby eliminating void formation at the interface and improving package reliability without compromising the bonding function
Solution Approach 2:
The bonding structure is segmented into distinct functional zones: a central bonding region for adhesive application and a peripheral barrier region for the perimeter material layer. This segmentation prevents material mixing while maintaining the bonding function, resolving the contradiction between achieving reliable bonds and preventing void formation
2Manufacturing precision
If pressure is applied during the molding process to ensure proper packaging, then the package structure is consolidated, but the bonding adhesive flows beyond the chip edges causing voids and reliability issues
Solution Approach 1:
The perimeter material layer is applied in advance before the molding process, creating a pre-formed barrier that confines the bonding adhesive within the desired perimeter. This preliminary action prevents adhesive extrusion during subsequent pressure application in molding, ensuring both precision and structural integrity
Solution Approach 2:
The perimeter material layer provides preliminary counter-action against the pressure-induced flow of bonding adhesive during molding. By establishing this barrier before pressure is applied, the system prevents the harmful effect of adhesive migration while allowing necessary consolidation pressure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents void formation in the molding structure and enhances the reliability of the semiconductor package by maintaining the first material layer within the designated area, ensuring stable electrical connections and structural integrity.
Implementation Method 1
The first material layer, which may include an adhesive film, may adhere to and join a plurality of semiconductor elements
Implementation Method 2
The second material layer, which may include insulating material, may retain the first material layer in a position between the joined semiconductor chips, and may prevent it from flowing beyond the edges of the joined semiconductor elements
Data Source
AI summary
A semiconductor package includes first and second semiconductor elements electrically interconnected by a connection structure. The first and second semiconductor elements are joined by a protection structure that includes an adhesive layer surrounded by a retention layer.