Semiconductor Underfill Sidewall Thickness for Singulation Chipping

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Solution Overview

Problem

Current semiconductor packaging methods face challenges in miniaturization and precision, particularly during the singulation process, where damage to devices can occur due to saw blade misalignment and chipping, leading to reduced packaging yields and increased costs.

Innovation Solution

A method involving the use of underfill material between and along scribe lines of coupled semiconductor devices, which are partially and then fully singulated using saw blades of varying widths to prevent damage and improve alignment, allowing the underfill to remain on sidewalls for protection during full singulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional singulation methods are used without underfill protection, then the singulation process is simpler and faster, but device damage occurs due to saw blade misalignment and chipping

Engineering Contradiction:
Improvedevice integrity during singulationVSAvoidpackaging process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The underfill material is applied to the sidewalls of semiconductor devices before the singulation process. This preliminary protective coating is deposited to a controlled thickness (e.g., 1-10 micrometers) to prevent chipping and damage during subsequent sawing operations, while allowing the singulation to proceed with conventional equipment and processes.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The underfill material serves as a cushioning layer on the sidewalls of semiconductor devices, absorbing mechanical stresses and preventing chipping during singulation. This protective layer compensates for potential saw blade misalignment and reduces the risk of device damage without requiring more complex singulation equipment or procedures.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Manufacturing precision

If underfill material is applied to protect devices during singulation, then device damage is reduced, but additional process steps and materials are required

Engineering Contradiction:
Improvesingulation accuracyVSAvoidpackaging process simplicity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The underfill material acts as an intermediary substance between the semiconductor device sidewalls and the saw blade during singulation. This intermediate layer protects the device from direct mechanical contact and damage, improving singulation accuracy while using conventional sawing equipment and processes that manufacturers already possess.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The underfill material is deposited with controlled parameters (thickness of 1-10 micrometers, specific material composition) to optimize protection during singulation. By controlling these parameters, the process achieves improved manufacturing precision without requiring fundamental changes to existing packaging equipment or procedures.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If saw blades of varying widths are used for singulation, then alignment precision is improved, but device complexity and process time increase

Engineering Contradiction:
Improvesaw blade alignmentVSAvoidsingulation throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

Instead of using multiple saw blades of different widths, the invention applies underfill material that provides a margin of protection exceeding the typical saw blade alignment tolerance. This partial protective action allows the use of a single standard-width saw blade while achieving the alignment precision that would otherwise require multiple specialized blades, thereby maintaining high productivity.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9935084B2Devices and methods of packaging semiconductor devices
Publication Date: 2018.04.03 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9935084B2 patent drawing
  • US9935084B2 patent drawing
  • US9935084B2 patent drawing

AI summary

Devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a device includes a first semiconductor device and a second semiconductor device coupled to the first semiconductor device. An underfill material is disposed between the first semiconductor device and the second semiconductor device. The underfill material is also disposed on sidewalls of the first semiconductor device and the second semiconductor device. The underfill material has a first thickness on sidewalls of the first semiconductor device and a second thickness on sidewalls of the second semiconductor device. The second thickness is different than the first thickness.