Semiconductor Chip Underfill Stress Reduction via Polyimide Buffer
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Solution Overview
Problem
Conventional semiconductor chips experience splits due to underfill layers between the laminate substrate and the chip, which is a critical issue that existing technologies have not effectively addressed.
Innovation Solution
A semiconductor chip structure is designed with multiple interconnect layers, dielectric layers, and an underfill layer sandwiched between the dielectric layers and the laminate substrate, where the underfill layer is positioned to prevent splits by using a flexible photosensitive polyimide layer and carefully engineered metallurgy to create edge seal and split stop regions, thereby preventing split propagation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an underfill layer is placed between the laminate substrate and the semiconductor chip, then the chip is protected and stress is distributed, but splits are created in the chip
Solution Approach 1:
A compliant layer is introduced as an intermediary between the underfill layer and the semiconductor chip. This compliant layer acts as a stress-absorbing buffer that prevents the underfill layer from directly transmitting stress to the chip, thereby eliminating splits while maintaining the protective function of the underfill structure
Solution Approach 2:
The patent changes the mechanical parameter of the interface layer by using a compliant layer with specific stress-absorbing properties. This parameter change allows the structure to accommodate stress without transmitting it to the chip, resolving the contradiction between protection and split prevention
2Object-affected harmful factors
If a compliant layer is added between the underfill layer and the chip, then splits are prevented, but the device complexity increases
Solution Approach 1:
The compliant layer is implemented as a thin film structure that provides the necessary stress-absorbing functionality without adding significant bulk or complexity. This thin film approach maintains simplicity while achieving the split prevention function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure effectively prevents splits in the semiconductor chip by using a flexible polyimide layer and strategically formed metallurgy, ensuring the integrity and reliability of the chip during fabrication and use.
Implementation Method 1
using a flexible photosensitive polyimide layer
Data Source
AI summary
Structures and methods for forming the same. A semiconductor chip includes a semiconductor substrate and a transistor on the semiconductor substrate. The chip further includes N interconnect layers on top of the semiconductor substrate and being electrically coupled to the transistor, N being a positive integer. The chip further includes a first dielectric layer on top of the N interconnect layers, and a second dielectric layer on top of the first dielectric layer. The second dielectric layer is in direct physical contact with each interconnect layer of the N interconnect layers. The chip further includes an underfill layer on top of the second dielectric layer. The second dielectric layer is sandwiched between the first dielectric layer and the underfill layer. The chip further includes a laminate substrate on top of the underfill layer. The underfill layer is sandwiched between the second dielectric layer and the laminate substrate.