Semiconductor Memory Programming With Variable Step Voltages

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Solution Overview

Problem

Existing semiconductor memory devices face challenges in achieving efficient program speed and read margin due to variations in program voltage application, particularly when the threshold voltage window is widened to improve reliability.

Innovation Solution

The semiconductor memory device employs a control logic to adjust program voltages based on a first and second step voltage during different program periods, and includes a method with incremental step pulse programming to optimize program loops, using higher step voltages in initial loops and lower step voltages in subsequent loops to narrow the threshold voltage distribution without significantly reducing speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a widened threshold voltage window is used to improve read margin, then reliability is improved, but program speed deteriorates due to variations in program voltage application

Engineering Contradiction:
Improveread marginVSAvoidprogram speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The program operation is segmented into multiple program loops, where each loop applies a program voltage with a different step voltage. The step voltage is determined based on the current program loop number, creating distinct voltage application phases that collectively achieve both wide threshold voltage window and fast programming.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The step voltage is dynamically adjusted based on the program loop number. Earlier program loops use larger step voltages to quickly establish the widened threshold voltage window, while later loops use smaller step voltages to fine-tune and maintain read margin, optimizing both speed and reliability throughout the programming process.

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If incremental step pulse programming is used to narrow threshold voltage distribution, then manufacturing precision is improved, but program speed may be reduced due to multiple program loops

Engineering Contradiction:
Improvethreshold voltage distributionVSAvoidprogram speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The step voltage parameter is changed based on the program loop number. By determining the step voltage dynamically according to the current loop position, the method achieves narrow threshold voltage distribution through controlled voltage increments while minimizing the total number of loops required, thus maintaining program speed.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If different step voltages are applied in different program periods, then program speed is improved, but device complexity increases due to control logic requirements

Engineering Contradiction:
Improveprogram speedVSAvoidcontrol logic
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The control logic determines the step voltage based on the program loop number, changing the voltage parameter dynamically. This systematic parameter change approach improves program speed by optimizing voltage application while keeping the control mechanism relatively simple, as it relies on a deterministic relationship between loop number and step voltage.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12431196B2Semiconductor memory device and operating method for performing program operation
Publication Date: 2025.09.30 SK HYNIX INC
  • US12431196B2 patent drawing
  • US12431196B2 patent drawing
  • US12431196B2 patent drawing

AI summary

A semiconductor memory device includes a memory cell array, a peripheral circuit, and control logic. The memory cell array includes a plurality of memory cells. The peripheral circuit performs a program operation on selected memory cells among the plurality of memory cells. The control logic controls the program operation of the peripheral circuit. The control logic controls the peripheral circuit to perform the program operation on the selected memory cells by using a first program voltage determined based on a first step voltage during a first program period and controls the peripheral circuit to perform the program operation on the selected memory cells by using a second program voltage determined based on a second step voltage different from the first step voltage during a second program period after the first program period.