Semiconductor Line Patterns with Varying Lengths via Spacer Patterning
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Solution Overview
Problem
Current semiconductor manufacturing techniques face challenges in forming fine patterns with varying lengths efficiently, particularly in creating parallel line patterns without requiring additional photolithography processes, which can lead to increased complexity and potential damage to peripheral circuit regions.
Innovation Solution
A method of fabricating semiconductor devices involving sequential layer formation, spacer formation, and etching processes to create line patterns with varying lengths, where each set includes four consecutively disposed line patterns in a direction, with the lengths of the line patterns and trench isolation structures varying, allowing for identical configurations without the need for additional photolithography steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If additional photolithography processes are used to form fine patterns with varying lengths, then manufacturing precision is improved, but device complexity and manufacturing time increase
Solution Approach 1:
The patent segments the pattern formation process into multiple stages using spacer-based self-aligned multiple patterning (SAMP). Instead of using multiple photolithography steps, the process divides pattern formation into: (1) forming initial mandrel patterns, (2) depositing first spacers to create intermediate patterns, (3) depositing second spacers to achieve final fine patterns with varying lengths. This segmentation enables precise pattern formation while avoiding the complexity of multiple photolithography processes.
Solution Approach 2:
The patent applies preliminary action by pre-forming mandrel patterns and spacers that automatically define the positions and lengths of final line patterns. The spacers are deposited conformally on mandrels with specific length variations, and subsequent etching transfers these pre-defined patterns to the target layer. This preliminary structuring eliminates the need for additional photolithography alignment steps.
2Manufacturing precision
If additional photolithography processes are used to form fine patterns, then manufacturing precision is improved, but manufacturing time increases
Solution Approach 1:
The patent employs periodic action through cyclic deposition and etching steps. The process alternates between: (1) depositing spacer material conformally on existing structures, (2) performing anisotropic etching to transfer patterns, (3) removing sacrificial mandrels. This periodic cycle of deposition-etch-remove operations efficiently creates complex fine patterns with varying lengths in a systematic manner, reducing total manufacturing time compared to sequential photolithography approaches.
3Manufacturing precision
If additional photolithography processes are used, then fine patterns can be formed, but peripheral circuit regions may be damaged
Solution Approach 1:
The patent uses spacer structures as intermediary elements that mediate between the patterning process and the peripheral circuit regions. The spacers are formed with controlled lengths and positions that act as protective buffers, allowing the etching process to selectively remove material in cell regions while automatically stopping before damaging peripheral circuits. The spacer length variations serve as a physical guide that protects sensitive areas without requiring additional protective masking steps.
4Adaptability or versatility
If line patterns with varying lengths are formed using conventional methods, then pattern flexibility is improved, but process complexity increases
Solution Approach 1:
The patent applies local quality by varying the length of spacer structures at different locations to create line patterns with specific length variations. The mandrel patterns and spacers are designed with local length adjustments in the second direction (perpendicular to the first direction), enabling different line patterns within the same set to have different lengths while maintaining consistent spacing and alignment. This local customization achieves pattern flexibility without requiring different processing conditions for each pattern.
Data Source
AI summary
A semiconductor device includes line patterns extending in a first direction, and separated from each other in a second direction perpendicular to the first direction. The plurality of line patterns includes at least two line sets, and each of the line sets includes four line patterns consecutively disposed in the second direction and having a length which varies based on location, and the at least two line sets have substantially an identical length.