Semiconductor Die with Varying Solder Bump Sizes
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Solution Overview
Problem
Conventional semiconductor IC die designs are limited by uniform solder pad size, which restricts die size reduction due to electromigration constraints, necessitating multiple die pads for high current terminals and limiting flip-chip assembly efficiency.
Innovation Solution
The use of varying solder bump sizes and corresponding die pad and UBM pad areas allows for a combination of current from multiple small pads into larger pads, enabling reduced die size while maintaining reliable performance by differentiating between high and low current connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If uniform minimum size die pads are used for all solder bumps, then the die size can be reduced, but electromigration reliability deteriorates for high current terminals
Solution Approach 1:
The patent applies local quality by differentiating die pad sizes based on current requirements: high current terminals receive enlarged die pads to meet electromigration criteria, while low current terminals use minimum size die pads. This localized differentiation allows the die to achieve compact overall size while maintaining reliability where needed.
2Reliability
If multiple die pads are used for high current terminals to meet electromigration criteria, then electromigration reliability is improved, but die size increases
Solution Approach 1:
The patent changes the parameter of die pad size dynamically based on current requirements. By adjusting the die pad area parameter locally at high current terminals while maintaining minimum size elsewhere, the solution achieves electromigration reliability without proportionally increasing overall die size.
3Ease of manufacture
If single bump size is used for all die pads, then manufacturing simplicity is maintained, but assembly adaptability deteriorates for different current requirements
Solution Approach 1:
The patent implements local quality by creating different bump size regions: larger bumps for high current terminals and smaller bumps for low current terminals. This localized differentiation provides assembly adaptability for different current requirements while using standard bump formation processes.
Data Source
AI summary
A semiconductor die includes a first contact stack including a first UBM pad on a first die pad, a second contact stack including a second UBM pad on a second die pad, and a third contact stack including a third UBM pad on a third die pad. The second UBM pad perimeter is shorter than the first UBM pad perimeter, and the third UBM pad perimeter is longer than the second UBM pad perimeter. A first solder bump is on the first UBM pad, a second solder bump is on the second UBM pad, and a third solder bump is on the third UBM pad. The first solder bump, second solder bump and third solder bump all have different sizes.


