Semiconductor Substrate Vertical Integration via Alignment Keys
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Solution Overview
Problem
The challenge in semiconductor device fabrication lies in achieving high integration and efficient electrical connection between stacked layers while managing thermal stress and process complexity, particularly in forming electrical interconnections and aligning cell arrays with peripheral circuits in three-dimensional structures.
Innovation Solution
The method involves forming a cell array on one surface and a peripheral circuit on the opposite surface of a semiconductor substrate, with vertical alignment keys and connection contacts to establish electrical connections, allowing for increased integration and reduced chip area, and using a support substrate as a heat sink to manage thermal stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If cell arrays and peripheral circuits are formed on opposite surfaces of a semiconductor substrate with vertical alignment, then integration density is enhanced and chip area is reduced, but manufacturing precision requirements increase due to the need for precise alignment between stacked layers
Solution Approach 1:
The patent transitions from planar integration to three-dimensional stacking by forming cell arrays and peripheral circuits on opposite surfaces of the semiconductor substrate. This vertical arrangement in the third dimension enables higher integration density while reducing the lateral chip area required.
Solution Approach 2:
Alignment keys are introduced as intermediary structures that extend vertically through the semiconductor substrate to provide reference markers for aligning the cell arrays and peripheral circuits on opposite surfaces. These alignment keys facilitate precise positioning during the fabrication process.
2Reliability
If vertical connection contacts are formed to electrically connect stacked circuits, then electrical characteristics are improved, but device complexity increases due to additional fabrication steps
Solution Approach 1:
The electrical connection path is segmented into multiple vertical connection contacts that pass through the semiconductor substrate to connect circuits on opposite surfaces. This segmentation enables independent formation and alignment of connection points, improving electrical reliability.
Solution Approach 2:
The alignment keys and connection contacts are merged into a single integrated structure that performs both alignment reference and electrical connection functions simultaneously, reducing the number of separate fabrication steps required.
3Temperature
If support substrate is used as heat sink to manage thermal stress, then thermal management is improved, but device complexity increases due to additional substrate attachment
Solution Approach 1:
A support substrate is introduced as an intermediary element that serves as a heat sink to manage thermal stress generated during operation. The support substrate absorbs and dissipates heat, preventing thermal damage to the delicate circuit structures.
Solution Approach 2:
The support substrate performs multiple functions simultaneously: it provides mechanical support for the semiconductor substrate, acts as a heat sink for thermal management, and serves as a mounting surface for additional components or packaging structures.
Data Source
AI summary
A method of fabricating a semiconductor device includes providing a semiconductor substrate having a first surface and a second surface opposite the first surface, forming an alignment key and a connection contact that penetrate a portion of the semiconductor substrate and extend from the first surface toward the second surface, forming a first circuit on the first surface of the semiconductor substrate such that the first circuit is electrically connected to the connection contact, recessing the second surface of the semiconductor substrate to form a third surface exposing the alignment key and the connection contact, and forming a second circuit on the third surface of the semiconductor substrate such that the second circuit is electrically connected to the connection contact.