Semiconductor Device With Vertical Current Flow and Low Substrate Resistance
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Solution Overview
Problem
In semiconductor devices with vertical current flow, the parasitic substrate resistance significantly contributes to the ON resistance, limiting current capacity, and reducing this resistance without compromising mechanical support is challenging due to the substrate's thickness limitations.
Innovation Solution
The implementation of metal vias within the substrate, which are high-conductivity paths that reduce the parasitic substrate resistance by creating a parallel conductive path and increasing the contact surface area, thereby minimizing the overall resistance while maintaining the substrate's structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the substrate thickness is reduced to decrease parasitic substrate resistance, then the electrical resistance decreases, but the mechanical support function is compromised
Solution Approach 1:
The substrate is segmented by creating recesses that divide the continuous substrate structure into distinct regions. These recesses allow metal vias to be embedded within the substrate, creating parallel conductive paths that reduce parasitic resistance without requiring overall substrate thinning, thus preserving mechanical strength.
Solution Approach 2:
The invention transitions from a two-dimensional surface contact approach to a three-dimensional embedded structure by forming recesses and embedding metal vias within the substrate volume. This dimensional change creates additional conductive pathways through the substrate thickness, reducing resistance while maintaining the substrate's mechanical integrity.
2Reliability
If metal vias are embedded in the substrate to reduce parasitic resistance, then the electrical conductivity increases, but the device complexity increases
Solution Approach 1:
The recesses and metal via structure serve multiple functions simultaneously: they provide mechanical support for the substrate, create parallel conductive paths to reduce parasitic resistance, and establish electrical contact between the substrate and rear-metallization layer. This multi-functionality reduces the need for separate structures, thereby managing complexity.
Solution Approach 2:
The invention merges the mechanical support function of the substrate with the electrical conduction function by embedding metal vias directly within the substrate recesses. This integration eliminates the need for separate contact structures, reducing overall device complexity while achieving both mechanical and electrical objectives.
3Reliability
If the contact surface area between substrate and rear-metallization layer is increased, then the parasitic resistance decreases, but the manufacturing alignment precision requirements increase
Solution Approach 1:
The recesses are formed in the substrate before the rear-metallization layer is deposited. This preliminary structuring of the substrate creates predefined contact regions that guide the subsequent metallization process, reducing alignment requirements and simplifying manufacturing while increasing the effective contact surface area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the total resistance of the semiconductor device, enhances heat dissipation, and simplifies production by not requiring alignment with active structures, thus improving the device's performance and efficiency.
Implementation Method 1
metal vias within the substrate, which are high-conductivity paths that reduce the parasitic substrate resistance by creating a parallel conductive path
Implementation Method 2
increasing the contact surface area, thereby minimizing the overall resistance while maintaining the substrate's structural integrity
Data Source
AI summary
A semiconductor device with vertical current flow includes a body having a substrate made of semiconductor material. At least one electrical contact on a first face of the body. A metallization structure is formed on a second face of the body, opposite to the first face. The metallization structure is provided with metal vias, which project from the second face within the substrate so as to form a high-conductivity path in parallel with portions of said substrate.