Semiconductor Via Layout to Limit CMP Galvanic Corrosion
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Solution Overview
Problem
Galvanic corrosion during chemical mechanical polishing (CMP) process leads to excessive removal of metal materials in conductive vias, resulting in poor interconnection quality in semiconductor devices.
Innovation Solution
Forming a dummy via with a width smaller than 50% of the conductive via on the terminal portion of a conductive structure, which reduces electron accumulation and minimizes galvanic corrosion by acting as an electron sink.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional CMP process is used to form conductive structures, then manufacturing simplicity is maintained, but galvanic corrosion occurs causing excessive metal removal and poor interconnection quality
Solution Approach 1:
The patent applies preliminary action by forming a dummy via structure before the CMP process. This dummy via, positioned at the terminal portion of the conductive structure, pre-establishes an electron sink that will actively counteract galvanic corrosion during the subsequent CMP process, preventing excessive metal removal before it occurs
Solution Approach 2:
The dummy via acts as an intermediary element between the conductive structure and the polishing slurry. It serves as a mediator that absorbs electrons and reduces the galvanic corrosion effect on the actual conductive vias, protecting the metal interconnection from excessive removal while allowing the CMP process to proceed
2Reliability
If dummy via is formed with width smaller than 50% of conductive via, then galvanic corrosion is reduced, but device structure complexity increases
Solution Approach 1:
The patent applies local quality by creating a dummy via with specific dimensional characteristics (width smaller than 50% of conductive via) at a specific location (terminal portion). This localized structural modification provides the electron sink function exactly where galvanic corrosion is most severe, without requiring changes to the entire conductive structure
Solution Approach 2:
The patent changes the width parameter of the dummy via to be smaller than 50% of the conductive via width. This parameter modification optimizes the electron sink capability while minimizing the added structural complexity. The specific dimensional ratio creates the necessary electrochemical gradient to protect the main conductive structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces the risk of excessive metal removal and enhances interconnection quality by preventing galvanic corrosion, ensuring stable metal material integrity.
Implementation Method 1
when the metal materials exposed to the polishing slurry have different electrical potentials, galvanic corrosion may occur between the metal materials
Implementation Method 2
reduces electron accumulation and minimizes galvanic corrosion by acting as an electron sink
Implementation Method 3
performing a chemical mechanical polishing process to remove the conductive material layer outside the first opening and the second opening
Data Source
AI summary
A method for forming a semiconductor structure includes forming a conductive structure in a first dielectric layer, the conductive structure including an terminal portion and an extending portion, forming a second dielectric layer on the first dielectric layer, forming a first opening through the second dielectric layer directly above the extending portion and a second opening through the second dielectric layer directly above the terminal portion, a width of the second opening being smaller than 50% of a width of the first opening, forming a conductive material layer on the second dielectric layer and filling the first opening and the second opening, and performing a chemical mechanical polishing process to remove the conductive material layer outside the first opening and the second opening to obtain a conductive via in the first opening and a dummy via in the second opening.