Semiconductor Via Filling with High-Viscosity Support Material
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Solution Overview
Problem
Existing semiconductor light-emitting devices face challenges in underfilling vias and trenches with conventional capillary underfill methods, leading to unfilled gaps and unintended filling in unintended areas, which can compromise structural integrity and require additional processing steps like removing underfill fillets from sidewalls.
Innovation Solution
A process involving a support material with a glass transition temperature greater than the operating temperature of the semiconductor structure is used to fill vias and trenches, which is then solidified and planarized to create a flat mounting surface, using techniques like spin coating, lapping, polishing, and plasma etching, and further acts as a passivation layer to prevent contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If capillary underfilling methods are used to fill vias and trenches, then the underfill material can wet surfaces with high surface energy, but the material cannot completely fill the voids due to insufficient viscosity and tends to fill unintended areas like sidewalls
Solution Approach 1:
The patent changes the viscosity parameter of the support material to be higher than conventional underfill materials, preventing capillary wicking into unintended areas while still enabling complete via filling through controlled application processes
Solution Approach 2:
The support material is applied before mounting to the carrier, allowing complete filling of vias and trenches in advance. This preliminary action ensures voids are filled before the structure is subjected to mounting stresses
2Stability of the object's composition
If conventional underfill materials with low viscosity are used, then they can wick into gaps through capillary attraction, but they leave unfilled gaps in vias and trenches
Solution Approach 1:
The patent changes the viscosity parameter from low (conventional underfill) to high (support material), fundamentally altering the filling mechanism from capillary wicking to controlled application that can completely fill via voids
3Strength
If underfill material is used to provide structural integrity, then enhanced structural integrity is achieved, but additional processing steps are required to remove underfill fillets from sidewalls
Solution Approach 1:
The patent changes the material properties by selecting support materials with higher viscosity and appropriate rheological characteristics that prevent fillet formation on sidewalls, eliminating the need for additional removal processing steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures complete filling of voids, minimizes thermal stresses, and provides a stable, contamination-resistant surface for mounting, enhancing the structural integrity and reliability of semiconductor light-emitting devices.
Implementation Method 1
The underfill material may be a material, such as an epoxy, which has weak internal or cohesive bonds, and thus has a strong tendency to wet other surfaces, particularly surfaces having a high surface energy. Many materials used for semiconductor mounting surfaces have a high surface energy in comparison with the underfill material, which causes the underfill to wick into gaps, aided by capillary attraction forces.
Implementation Method 2
Causing the support material to substantially fill the via is followed by causing the support material to solidify sufficiently whereby the upper surfaces of the first and second electrode metal layers and the support material provide a substantially flat mounting surface
Implementation Method 3
The dielectric layer is deposited over the side wall surfaces of the via and a portion of the metal layer
Implementation Method 4
The electrode metal layer is deposited over the dielectric layer and the bottom wall surface of the via for providing electrical connection to the first conductivity type semiconductor material
Data Source
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AI summary
A process for preparing a semiconductor structure (30) for mounting to a carrier (70) is disclosed. The process involves causing a support material (80, 110) to substantially fill a void defined by surfaces formed in the semiconductor structure and causing the support material to solidify sufficiently to support the semiconductor structure when mounted to the carrier.