Semiconductor Via Layout for Current Density and Heat Control
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Solution Overview
Problem
Conventional semiconductor devices experience increased current density in via wirings, leading to localized heat generation and breakage, which compromises the reliability of electrical connections.
Innovation Solution
The semiconductor device design includes larger first via wirings adjacent to the current output terminal, with smaller second via wirings arranged in staggered rows, distributing current density more evenly and reducing heat concentration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple via wirings are used to connect the wiring layer to the semiconductor element electrode, then electrical connection is established, but current density concentrates in some via wirings causing localized heat generation and breakage
Solution Approach 1:
The patent applies local quality by making via wirings adjacent to the current output terminal larger in size than other via wirings. This non-uniform size distribution specifically addresses the local area where current density concentration occurs, allowing these critical via wirings to handle higher current loads and dissipate heat more effectively, thereby preventing breakage while maintaining overall connection reliability.
2Object-affected harmful factors
If via wirings are made larger to reduce current density, then heat concentration is reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
Rather than uniformly enlarging all via wirings which would increase overall device complexity, the patent applies local quality by selectively enlarging only the via wirings adjacent to the current output terminal. This targeted approach reduces heat concentration where it is most critical while maintaining simpler, smaller via wirings in other areas, thus balancing thermal management with device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the reliability of electrical connections by minimizing heat-related failures in via wirings, thereby improving the overall performance and longevity of the semiconductor device.
Implementation Method 1
multiple via wirings extending through the upper substrate in a thickness-wise direction and connected to the second electrode
Implementation Method 2
when a current flows to the semiconductor element, the current density may be increased in (concentrated on) some of the via wirings. The increased current density may generate heat in the via wiring
Data Source
AI summary
A semiconductor device includes a lower substrate, a first wiring pattern disposed on the lower substrate with a current input terminal, a semiconductor element mounted on the lower substrate with a first electrode electrically connected to the first wiring pattern and a second electrode opposed to the first wiring pattern, an upper substrate disposed on the second electrode, via wirings extending through the upper substrate and connected to the second electrode, a second wiring pattern disposed on the upper substrate and electrically connected to the second electrode via the via wirings, and a current output terminal. The second wiring pattern is electrically connected to the current output terminal and extends from the second electrode toward the current output terminal in plan view. Among the via wirings, first via wirings closest to the current output terminal are larger than second via wirings adjacent to the first via wirings in plan view.