Semiconductor Chip Via Insulating Layer Metal Diffusion Barrier
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Solution Overview
Problem
In semiconductor devices, the mechanical dicing process using a dicing blade is not effective in preventing chipping and cracking, leading to a reduced metal gettering effect and potential reliability issues due to metal diffusion into the semiconductor chip.
Innovation Solution
A semiconductor chip design that includes a via and an insulating layer in a semiconductor substrate with a narrower first trench surrounding the circuit region, which acts as a barrier to prevent metal diffusion and enhance reliability by using materials like silicon nitride or silicon oxide for the insulating layer and titanium or titanium nitride for the barrier metal layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If laser dicing or plasma etching is used instead of mechanical dicing, then chipping and cracking are suppressed, but the metal gettering effect is reduced and metal diffusion occurs
Solution Approach 1:
The patent divides the cutting process into two stages: first, laser dicing creates the initial separation, then mechanical dicing with a dicing blade completes the cut. This segmentation allows each method to perform its optimal function - laser for precision and non-contact separation, mechanical dicing for creating a rough surface with metal gettering effect.
Solution Approach 2:
The patent combines multiple dicing methods (laser dicing and mechanical dicing) into a single process flow. The laser dicing step is performed first to prevent chipping, followed by mechanical dicing to create the rough cut surface needed for metal gettering, thus merging the advantages of both methods.
2Stress or pressure
If the trench width is reduced to minimize stress, then stress and deformation during stacking are minimized, but the barrier effect against metal diffusion may be weakened
Solution Approach 1:
The patent applies different properties to different parts of the trench structure. The trench is filled with insulating material having different mechanical properties (lower modulus of elasticity) than the semiconductor substrate, creating local quality differences that reduce stress while maintaining the barrier function through the insulating material's diffusion resistance.
Solution Approach 2:
The trench structure uses composite materials - the trench walls are formed by the semiconductor substrate itself, while the trench interior is filled with insulating material (such as silicon oxide or silicon nitride). This composite structure provides both stress reduction through material property differences and metal diffusion prevention through the insulating barrier.
3Reliability
If the trench is filled with insulating material, then metal diffusion is prevented, but the device complexity increases
Solution Approach 1:
The insulating material filling the trench serves multiple functions simultaneously: it acts as a barrier to prevent metal diffusion, provides mechanical stress relief due to its lower modulus of elasticity, and can serve as an electrical insulator. This multi-functionality reduces the need for additional separate structures.
Solution Approach 2:
The trench is filled with insulating material before the final dicing and stacking processes. This preliminary action ensures that the barrier is already in place to prevent metal diffusion during subsequent processing and operation, and the stress-relief structure is already formed before stacking occurs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The insulating layer effectively suppresses thermal diffusion of contaminating metal, reducing the likelihood of characteristics and reliability degradation, and the narrower trench design minimizes stress and deformation during stacking and sealing, enhancing the chip's performance and reliability.
Implementation Method 1
The insulating layer suppresses thermal diffusion of contaminating metal into the semiconductor chip
Data Source
AI summary
According to one embodiment, a semiconductor chip includes a semiconductor substrate, a via and an insulating layer. The semiconductor substrate has a first major surface and a second major surface on opposite side from the first major surface. The semiconductor substrate is provided with a circuit section including an element and a wiring and a guard ring structure section surrounding the circuit section on the first major surface side. The via is provided in a via hole extending from the first major surface side to the second major surface side of the semiconductor substrate. The insulating layer is provided in a first trench extending from the first major surface side to the second major surface side of the semiconductor substrate.