Semiconductor Through Via Insulation for Stable High Voltage Operation

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Solution Overview

Problem

The application of TSV technology in semiconductor devices, such as NAND flash memory, leads to unstable operation and potential yield reduction due to high power supply voltage, necessitating increased chip area and reduced flexibility in device arrangement to prevent depletion layer extension affecting adjacent elements.

Innovation Solution

A semiconductor device structure with a p-type semiconductor layer, a conductive through via, and a surrounding p-type semiconductor region with higher impurity concentration, along with insulating films, to suppress depletion layer extension and stabilize element operation without increasing chip area or reducing flexibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a high power supply is supplied to the through via to enable high-density mounting, then the data transfer speed is improved, but a potential difference with elements occurs causing unstable operation and yield reduction

Engineering Contradiction:
Improvedata transfer speedVSAvoidelement operation stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

An insulating film is introduced as an intermediary layer between the through via and the element. This mediator prevents direct electrical interaction while allowing the high power supply to be maintained in the through via for high-speed data transfer, thereby eliminating the potential difference issue that caused unstable element operation

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The insulating film acts as a sacrificial or protective layer that can be optimized for cost and performance. By using this disposable-like protective barrier, the system can maintain high voltage in the through via without compromising element reliability, effectively decoupling the two requirements

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Reliability

If a sufficient distance is set between the through via and the element to prevent yield reduction, then element operation stability is improved, but the chip area increases

Engineering Contradiction:
Improveelement operation stabilityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The insulating film serves as a mediator that allows the through via to be positioned closer to the element without causing electrical interference. This intermediary protection enables reduced spacing while maintaining element operation stability, thereby decreasing the overall chip area

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The introduction of the insulating film changes the electrical parameters of the system, allowing for reduced physical distance between the through via and element. By modifying the electrical isolation mechanism rather than relying solely on physical distance, the chip area is reduced while maintaining reliability

Inventive Principle:
Principle #35Parameter changes

3Reliability

If a sufficient distance is set between the through via and the element to prevent yield reduction, then element operation stability is improved, but the flexibility in device arrangement is reduced

Engineering Contradiction:
Improveelement operation stabilityVSAvoiddevice arrangement flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The insulating film provides a flexible design parameter that allows various device arrangements. By ensuring electrical isolation through this intermediary layer, designers can place components in different configurations without worrying about potential difference issues, thereby maintaining both reliability and arrangement flexibility

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed structure effectively prevents yield reduction and maintains stable operation of semiconductor devices under high voltage conditions, allowing for reduced chip area and increased flexibility in device arrangement.

Implementation Method 1

a first insulating film provided between the first conductive layer and the semiconductor layer and between the first conductive layer and the first semiconductor region

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

a concentration of an impurity element contained in the first semiconductor region being higher than a concentration of an impurity element contained in the semiconductor layer

Methodology Applied
Scientific EffectImpurity concentration effect: Dopants

Data Source

PatentUS9705009B2Semiconductor device
Publication Date: 2017.07.11 KIOXIA CORP
  • US9705009B2 patent drawing
  • US9705009B2 patent drawing
  • US9705009B2 patent drawing

AI summary

According to one embodiment, a semiconductor device includes: a semiconductor layer of a first conductivity type, and the semiconductor layer having a first and a second surfaces; a first conductive layer penetrating from the first surface side to the second surface side of the semiconductor layer; a first semiconductor region of a first conductivity type surrounding part of the first conductive layer on the second surface side of the semiconductor layer, a portion other than a front surface of the first semiconductor region being surrounded by the semiconductor layer; and a first insulating film provided between the first conductive layer and the semiconductor layer and between the first conductive layer and the first semiconductor region, a concentration of an impurity element contained in the first semiconductor region being higher than a concentration of an impurity element contained in the semiconductor layer.