Semiconductor Package Connection Structure with Symmetric Via Zones
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Solution Overview
Problem
Semiconductor packages face challenges in reducing stress and achieving balanced stress distribution, as well as improving conductivity, particularly in wafer level chip scale packages (WLCSPs), where existing connection structures may not adequately address these issues.
Innovation Solution
A connection structure comprising a conductive unit with a rim, slanting side wall, and base, along with multiple insulating layers and strategically placed vias, which allows for better conductivity and stress reduction by distributing stress symmetrically, is proposed. This structure includes solder bumps in direct contact with the conductive unit and insulating layers with specific via zones for optimal via placement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional connection structures are used in semiconductor packages, then manufacturing is simpler, but stress distribution is unbalanced and conductivity is insufficient
Solution Approach 1:
The connection structure is segmented into multiple functional components: conductive units with distinct flange, slanting side wall, and base portions; multiple insulating layers (first, second, third); and multiple vias (first, second, third) at different positions. This segmentation allows each component to perform its specific function optimally while contributing to balanced stress distribution throughout the package structure.
Solution Approach 2:
Different regions of the conductive unit are designed with local quality variations: the flange provides lateral support, the slanting side wall manages stress transitions, and the base ensures stable electrical connection. Similarly, vias are strategically positioned in specific via zones within insulating layers to optimize both stress distribution and conductivity in different local areas of the package.
2Reliability
If more vias are added to improve conductivity, then electrical connection is better, but stress concentration may increase
Solution Approach 1:
The via parameters are optimized by controlling their positions within specific via zones defined in the insulating layers. The first via is positioned in a first via zone, the second via in a second via zone, and the third via in a third via zone, ensuring adequate spacing between vias. This parameter control allows multiple vias to provide improved conductivity while maintaining balanced stress distribution throughout the connection structure.
3Manufacturing precision
If via zones are defined within vertical projection of conductive unit, then via placement precision is improved, but manufacturing complexity increases
Solution Approach 1:
Via zones are pre-defined within the vertical projection of the conductive unit in the insulating layers before via formation. The first via zone, second via zone, and third via zone are established as specific regions where vias will be positioned. This preliminary definition of via zones guides subsequent via formation processes, ensuring precise via placement while providing clear manufacturing guidelines that simplify the overall fabrication process.
Data Source
AI summary
A connection structure is provided. The connection structure comprises a conductive unit, a solder bump, a first insulating layer, a second insulating layer, a third insulating layer, and a plurality of vias. The solder bump is in direct contact with the conductive unit. The first insulating layer is located under a flange of the conductive unit. The second insulating layer is located under a base of the conductive unit. The third insulating layer is located under the second insulating layer. The third insulating layer has a via zone. A plurality of vias are located in the via zone. The via zone is within a vertical projection of the conductive unit.