Semiconductor Via Structure Using One Mask for Multiple Via Sizes
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Solution Overview
Problem
The semiconductor industry faces challenges in manufacturing complex semiconductor structures with varying via dimensions, which increases the complexity and cost of the manufacturing process.
Innovation Solution
A semiconductor structure is designed with vias of different dimensions by using a mask with varying transmission rates during the lithography process, allowing for the formation of both large and small vias using a single mask.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple masks are used to form vias of different dimensions, then manufacturing precision is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent changes the optical parameters of the mask by incorporating regions with different transmission rates (fully transparent, partially transparent, and opaque regions) to form vias of different dimensions through a single lithography process, eliminating the need for multiple masks and process steps
Solution Approach 2:
The single mask is designed to perform multiple functions by containing different transmission rate regions that simultaneously define multiple via sizes, allowing one mask to replace what would traditionally require multiple specialized masks
2Manufacturing precision
If multiple masks are used to form vias of different dimensions, then manufacturing precision is improved, but loss of substance increases
Solution Approach 1:
The patent merges the functionality of multiple masks into a single mask structure, where different regions of the same mask control the formation of vias with different dimensions, thereby reducing material consumption and simplifying the manufacturing process
3Adaptability or versatility
If via dimensions are varied in the semiconductor structure, then adaptability is improved, but device complexity increases
Solution Approach 1:
The mask is designed with spatially varying local properties (different transmission rates in different regions) to create vias of different dimensions in specific locations, allowing the semiconductor structure to accommodate varying via requirements without increasing overall process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and material usage by enabling the formation of multiple via sizes with a single mask, simplifying the process and improving efficiency.
Implementation Method 1
forming a first patterned photoresist layer over the passivation layer. The first patterned photoresist layer includes a first through hole and a first indentation
Data Source
AI summary
The present application provides a semiconductor structure having vias with different dimensions and a manufacturing method of the semiconductor structure. The semiconductor structure includes a first wafer including a first substrate, a first dielectric layer over the first substrate, and a first conductive pad surrounded by the first dielectric layer; a second wafer including a second dielectric layer, a second substrate over the second dielectric layer, and a second conductive pad surrounded by the second dielectric layer; a passivation disposed over the second substrate; a first conductive via extending from the first conductive pad through the second wafer and the passivation, and having a first width surrounded by the second wafer; and a second conductive via extending from the second conductive pad through the passivation and the second substrate and partially through the second dielectric layer, and having a second width surrounded by the second wafer.