Semiconductor Device Impurity Profile for Vibration Suppression
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Solution Overview
Problem
Conventional vertical semiconductor devices with field stop layers at shallow positions struggle to effectively suppress turn-off and reverse recovery vibrations in IGBTs and similar devices.
Innovation Solution
A semiconductor device configuration with a semiconductor substrate having a peak region, a high concentration region, and a low concentration region, along with a defect region formed by proton doping and electron beam irradiation, which controls impurity concentration and carrier lifetime to prevent depletion layer extension and reduce dv/dt and surge voltage during reverse recovery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a field stop layer is provided at a shallow position, then the device structure is simpler and easier to manufacture, but turn-off vibrations and reverse recovery vibrations cannot be sufficiently suppressed
Solution Approach 1:
The field stop layer is divided into multiple segments along the depth direction: a first field stop layer at a shallow position and a second field stop layer at a deeper position. This segmentation allows each layer to perform different functions - the first layer provides basic field stopping with simpler manufacturing, while the second layer suppresses turn-off and reverse recovery vibrations, thus resolving the contradiction between ease of manufacture and vibration suppression effectiveness.
Solution Approach 2:
The solution transitions from a single-layer field stop structure to a multi-layer structure with different depth positions. By adding the depth dimension as a stratification parameter, the patent creates a vertical distribution of field stop layers that can simultaneously achieve easy manufacturing (first layer at shallow position) and effective vibration suppression (second layer at deeper position), resolving the contradiction between these two requirements.
2Ease of manufacture
If a field stop layer is provided at a shallow position, then the manufacturing process is simpler, but reverse recovery vibrations cannot be sufficiently suppressed
Solution Approach 1:
The field stop function is segmented into two distinct layers: the first field stop layer positioned shallowly for manufacturing simplicity, and the second field stop layer positioned deeper for suppressing reverse recovery vibrations. This segmentation allows the patent to satisfy both the ease of manufacture requirement and the harmful factor suppression requirement simultaneously.
Solution Approach 2:
Different regions of the field stop structure are assigned different qualities and functions. The first field stop layer at the shallow position is optimized for manufacturing ease, while the second field stop layer at the deeper position is optimized for vibration suppression. This local differentiation of quality and function resolves the contradiction between manufacturing simplicity and reverse recovery vibration suppression.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The described configuration effectively suppresses turn-off and reverse recovery vibrations, smoothing voltage and current waveforms during switching by optimizing impurity concentration and carrier lifetime, thereby enhancing the performance of semiconductor devices.
Implementation Method 1
doping a proton from a side of a back surface of a semiconductor substrate
Implementation Method 2
forming a defect region to extend in a depth direction of the semiconductor substrate after the annealing
Data Source
AI summary
Provided is a semiconductor device including: a semiconductor substrate doped with an impurity; a front-surface-side electrode provided at a side of a front surface of the semiconductor substrate; and a back-surface-side electrode provided at a side of a back surface of the semiconductor substrate; wherein the semiconductor substrate includes: a peak region arranged at the side of the back surface of the semiconductor substrate and having one or more peaks of an impurity concentration; a high concentration region arranged closer to the front surface than the peak region and having an impurity concentration more gently sloped than the one or more peaks; and a low concentration region arranged closer to the front surface than the high concentration region and having an impurity concentration lower than the impurity concentration of the high concentration region and a substrate concentration of the semiconductor substrate.