Semiconductor Metal Layout With Virtual Blocks for Lower Parasitic Capacitance

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Solution Overview

Problem

The non-uniform distribution of signal lines on semiconductor metal layers leads to parasitic capacitance issues and manufacturing challenges, such as etching difficulties and yield reduction due to the load effect and excessive parasitic capacitance, which affect the performance and efficiency of semiconductor integrated circuits.

Innovation Solution

The semiconductor structure incorporates virtual metal blocks on adjacent metal layers, staggered in a direction perpendicular to the substrate, with varying distances from signal lines to reduce parasitic capacitance and ensure wiring uniformity, thereby improving manufacturing yield and reducing parasitic capacitance between virtual metal blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If signal lines are non-uniformly distributed on metal layers, then wiring flexibility is improved, but parasitic capacitance increases and manufacturing yield decreases

Engineering Contradiction:
Improvewiring flexibilityVSAvoidparasitic capacitance
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

Virtual metal blocks are introduced as intermediary elements between signal lines to mediate the electrical field distribution. These virtual metal blocks act as shields that redistribute electric field lines, thereby reducing the parasitic capacitance between non-uniformly distributed signal lines while preserving the flexible wiring layout.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the physical parameters of the metal layer by adding virtual metal blocks with specific geometries and positions. By adjusting the area, shape, and location of these virtual metal blocks, the parasitic capacitance parameters are optimized without altering the signal line configuration, thus maintaining wiring flexibility while reducing harmful capacitance effects.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If signal lines are non-uniformly distributed on metal layers, then design freedom is improved, but etching difficulty increases due to load effect

Engineering Contradiction:
Improvedesign freedomVSAvoidetching difficulty
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

Virtual metal blocks serve as intermediary structures that modify the etching load distribution across the metal layer. By strategically placing these blocks, the etching process experiences more uniform loading conditions, reducing the severity of the load effect and improving etching uniformity while allowing non-uniform signal line distributions for design freedom.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If virtual metal blocks are placed close to signal lines, then wiring uniformity is improved, but parasitic capacitance between virtual metal blocks increases

Engineering Contradiction:
Improvewiring uniformityVSAvoidparasitic capacitance between virtual metal blocks
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by making virtual metal blocks have non-uniform electrical properties in different regions. Virtual metal blocks closer to signal lines have different characteristics (such as smaller area or different connectivity) compared to those farther away, optimizing the local parasitic capacitance management while maintaining overall wiring uniformity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12261109B2Semiconductor structure
Publication Date: 2025.03.25 CHANGXIN MEMORY TECH INC
  • US12261109B2 patent drawing
  • US12261109B2 patent drawing
  • US12261109B2 patent drawing

AI summary

A semiconductor structure includes a plurality of metal layers and a substrate. The plurality of metal layers are provided with a plurality of virtual metal blocks and at least one signal line. A first projection of a first virtual metal block on the substrate is a polygon, the first projection has a plurality of effective sides opposite to a second projection of a target signal line on the substrate, and differences from the plurality of effective sides of the first projection to a straight line where the second projection is located are different, and the first virtual metal block is a virtual metal block, closest to the target signal line, on the target metal layer, and the target metal layer is a metal layer where the target signal line is located.