Semiconductor Device Virtual Power Supply Interconnect
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Solution Overview
Problem
In semiconductor integrated circuits with stacked interconnects, the presence of power supply stacked-via portions restricts the linear passage of signal interconnects, limiting the design freedom and increasing voltage drop influence, especially near signal terminal portions.
Innovation Solution
The semiconductor device incorporates a power switch implemented by a primitive unit lattice under the interconnect layers, with a lowermost layer featuring power, ground, and virtual power interconnects, and stacked vias that penetrate through multiple layers, allowing signal interconnects to be passed even under power switches in intermediate layers, optimizing voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power supply stacked-via portions are placed in a spread fashion to connect upper-side power supply interconnect layers and power switches, then power supply distribution is improved, but signal interconnects cannot be passed in linear shapes, resulting in lowered design freedom
Solution Approach 1:
The patent introduces a virtual power supply interconnect layer positioned between the lowermost and intermediate interconnect layers. This adds a new dimensional layer to the power supply distribution architecture, allowing power switches to access power supply from multiple layers (lowermost and intermediate) rather than being constrained to a single layer. This multi-layer approach resolves the conflict by providing power supply reliability through distributed vias while maintaining signal interconnect design freedom through the virtual power supply layer configuration.
Solution Approach 2:
The power supply distribution system is segmented into multiple independent power supply paths: lowermost power supply interconnects, intermediate power supply interconnects, and virtual power supply interconnects. Power switches can selectively connect to different power supply layers through separate via portions, creating segmented power delivery paths. This segmentation allows signal interconnects to pass linearly through intermediate layers without being blocked by power supply vias, thus maintaining design freedom while ensuring reliable power distribution.
2Ease of operation
If power switches are placed in the lowermost interconnect layer for each functional block region, then power supply control is improved, but voltage drop influence increases near signal terminal portions
Solution Approach 1:
The virtual power supply interconnect layer acts as an intermediary between the lowermost power supply layer and the intermediate signal layers. It provides a middle-ground power distribution path that reduces the distance between power switches and signal terminal portions without requiring power switches to be physically relocated. This intermediary layer delivers power more efficiently to distant terminals, reducing voltage drop while preserving the ease of operation benefits of distributed power switch placement.
Solution Approach 2:
By adding the virtual power supply interconnect layer as an intermediate dimension in the vertical stack, the patent creates shorter power delivery paths to signal terminals in intermediate layers. Signals in intermediate layers can access power from the virtual power supply layer directly above them, rather than drawing power from distant lowermost layer switches through long vertical via paths. This dimensional addition reduces voltage drop while maintaining the distributed power control architecture.
Data Source
AI summary
In general, according to one embodiment, a semiconductor device includes a power switch, a lowermost interconnect layer in which a power supply interconnect, a ground interconnect and a virtual power supply interconnect are formed, each having an access point to the power switch, an intermediate interconnect layer above the lowermost interconnect layer, an uppermost interconnect layer in which a power supply interconnect, a ground interconnect and a virtual power supply interconnect are formed, an interconnect layer located above the intermediate interconnect layer, and located immediately under the uppermost interconnect layer, and a power supply via, a ground via and a virtual power supply via.