Semiconductor Integrated Circuit Virtual Power Supply Line Leak Current Reduction
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Solution Overview
Problem
The challenge in semiconductor devices is the increase in off-leak current, which contributes significantly to power consumption, and existing MT-CMOS technology faces complexities in proper transistor sizing for sleep transistors due to varying circuit scales, requiring intricate circuit design processes.
Innovation Solution
The semiconductor device design includes a power control region with a virtual power supply line and switch cells that eliminate the influence of metal interconnection resistance, allowing for standardized sizing of switch elements based on maximum allowed current of basic power supply lines, and switch transistors are activated at different timings to reduce rushing currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If MT-CMOS technology with sleep transistors is used to reduce off-leak current, then power consumption is reduced, but transistor sizing becomes complex due to varying circuit scales
Solution Approach 1:
The patent introduces a virtual power supply line with controllable voltage (Vddv) that can be independently adjusted from the main power supply voltage (Vdd). By changing the voltage parameter of the virtual power supply line, the off-leak current is reduced without requiring complex transistor sizing adjustments, as the voltage control directly modulates the leak current through the sleep transistor
Solution Approach 2:
The power supply system is segmented into a main power supply line (Vdd) and a virtual power supply line (Vddv) that serves specific load circuits. This segmentation allows independent control of power delivery to different circuit regions, enabling simplified transistor sizing in the sleep transistor while maintaining effective off-leak current reduction through localized voltage control
2Loss of energy
If virtual power supply line is introduced to control off-leak current, then power consumption decreases, but circuit structure becomes more complex
Solution Approach 1:
The virtual power supply line control circuit is merged with the existing power supply infrastructure by utilizing the same physical wiring layer for both Vdd and Vddv distribution. The sleep transistor is integrated into the existing circuit blocks, combining the leak reduction function with the power supply distribution network and minimizing additional structural complexity
3Loss of energy
If power supply is controlled in units of specific regions, then off-leak current is reduced, but design process becomes intricate
Solution Approach 1:
The virtual power supply line control mechanism is designed as a universal module that can be applied to any load circuit block regardless of its specific function or size. The same control architecture and transistor sizing rules can be reused across different circuit regions, simplifying the design process while maintaining effective off-leak current reduction in each region
Data Source
AI summary
A semiconductor device is composed of: a power control region within which function cells are arranged; a basic power supply line overlapping said power control region, and positioned in a power supply interconnection layer; a virtual power supply line arranged in said power control region in a direction perpendicular to said basic power supply line, said function cells being connected to said virtual power supply line; a ground line arranged in said power control region in said direction perpendicular to said basic power supply line; a switch cell including a metal interconnection positioned in a metal interconnection layer different from said power supply interconnection layer, and a switch element electrically connected between said metal interconnection and said virtual power supply line; and a via contact connected between said basic power supply line and said metal interconnection. The switch cell is positioned within power control region. The switch element is positioned adjacent to said via contact within said switch cell. The metal interconnection is positioned between said virtual power supply line and said ground line within said switch cell.