Semiconductor Integrated Circuit Voltage Scaling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor integrated circuits face challenges in efficiently reducing power consumption due to difficulties in setting optimal source voltage values for multifunction DSPs, leading to increased power consumption and inefficiencies in Dynamic Voltage Scaling (DVS) and Adaptive Voltage Scaling (AVS) techniques.
Innovation Solution
A semiconductor integrated circuit design that utilizes multiple canary flip-flops and delay circuits to compare signal delays and control source voltage, allowing for precise adjustment of voltage levels to match workload demands, thereby optimizing voltage scaling and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If source voltage is increased to ensure adequate margins for critical paths, then reliability is improved, but power consumption increases
Solution Approach 1:
The patent applies different voltage levels to different functional blocks within the semiconductor integrated circuit. The control circuit selectively increases source voltage only for specific functional blocks that require adequate timing margins, rather than uniformly increasing voltage across the entire circuit. This localized voltage adjustment ensures reliability for critical paths while minimizing power consumption increases in non-critical areas.
2Use of energy by moving object
If source voltage is decreased to reduce power consumption, then power consumption is reduced, but timing margins become insufficient
Solution Approach 1:
The patent implements dynamic voltage adjustment where the control circuit continuously monitors timing margins and dynamically adjusts source voltage levels for different functional blocks. When timing margins become insufficient, the control circuit increases voltage for affected blocks; when margins are adequate, voltage is reduced to minimize power consumption. This dynamic adaptation allows the circuit to optimize between power consumption and reliability in real-time.
3Use of energy by moving object
If uniform voltage scaling is applied to all functional blocks, then power consumption is reduced, but timing requirements for individual blocks cannot be met
Solution Approach 1:
The patent divides the semiconductor integrated circuit into multiple independent functional blocks, each with its own voltage control. The control circuit independently adjusts source voltage for each functional block based on its specific timing requirements and workload. This segmentation allows different blocks to operate at different voltage levels, ensuring that timing-critical blocks receive adequate voltage while non-critical blocks operate at lower voltages to reduce power consumption.
Data Source
AI summary
A semiconductor integrated circuit includes: a first flip-flop, a combined circuit and a second flip-flop that form a critical path; a first delay circuit and a third flip-flop that are provided in the post-stage of the combined circuit; a second delay circuit and a fourth flip-flop that are provided in the post-stage of the combined circuit; a first comparison circuit that compares the output of the second flip-flop with the output of the third flip-flop; a second comparison circuit that compares the output of the second flip-flop with the output of the fourth flip-flop: and a control circuit that controls a source voltage supplied to the combined circuit in accordance with the outputs of the comparison circuits. A delay time by the first delay circuit is different from a delay time by the second delay circuit.