Semiconductor Withstand Voltage Screening Across Temperature
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor device testing methods are inefficient when evaluating withstand voltage at extreme temperatures, as they require direct testing at the specified temperature, which can be time-consuming and may not accurately predict performance at lower temperatures.
Innovation Solution
A method that estimates the required withstand voltage at a higher temperature by testing semiconductor devices at room temperature using a pseudo-testing approach, where the relationship between withstand voltages at different temperatures is established through a series of tests, allowing for efficient screening at the lower temperature without direct testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If direct testing at low temperature is performed to accurately evaluate withstand voltage specifications, then measurement precision is improved, but productivity deteriorates due to time-consuming cooling and testing processes
Solution Approach 1:
The patent applies preliminary action by performing tests at room temperature before low-temperature testing. Multiple inspection voltages are applied sequentially at room temperature to identify and eliminate defective devices, so that only devices requiring low-temperature testing proceed to that stage. This preliminary screening reduces the number of devices that need time-consuming low-temperature testing.
Solution Approach 2:
The testing process is segmented into distinct stages: room temperature testing with multiple inspection voltages, followed by low temperature testing only for devices that pass the initial screening. This segmentation allows the testing process to be divided into efficient room temperature screening and necessary low temperature verification, improving overall productivity while maintaining measurement precision for devices that require it.
2Productivity
If multiple inspection voltages are applied at room temperature to screen defective devices, then productivity is improved by reducing low temperature testing, but device complexity increases due to multiple testing stages
Solution Approach 1:
The patent applies parameter changes by varying the inspection voltage across multiple testing stages at room temperature. Different inspection voltages (first, second, third inspection voltages) are applied in sequence to progressively screen devices. This approach uses voltage parameter variation to efficiently identify defective devices without requiring complex low-temperature testing for all devices.
Solution Approach 2:
The patent uses room temperature testing as a copy or substitute for low temperature testing. By performing multiple inspection voltage tests at room temperature, the process creates a surrogate screening mechanism that identifies most defective devices without requiring them to undergo the more complex and time-consuming low temperature testing process.
3Reliability
If all devices undergo low temperature testing to ensure quality, then reliability is improved, but loss of time increases due to cooling and testing duration
Solution Approach 1:
Preliminary room temperature testing with multiple inspection voltages is performed to screen and eliminate defective devices before low temperature testing. This preliminary action ensures that only devices passing the initial screening undergo time-consuming low temperature testing, maintaining reliability while significantly reducing overall testing time.
Solution Approach 2:
The patent applies partial action by performing low temperature testing only on devices that pass the room temperature screening, rather than on all devices. This partial application of low temperature testing maintains quality control for devices that need it while avoiding unnecessary time loss on devices already identified as defective through room temperature inspection.
Data Source
AI summary
Provided is a test method comprising: preparing a plurality of groups for setting, each of which has a plurality of semiconductor devices for setting, and assigning an inspection voltage to each of the respective plurality of groups for setting; performing first testing by applying the assigned inspection voltage to the semiconductor devices for setting, and testing, at a first temperature, the plurality of semiconductor devices for setting included in each of the plurality of groups for setting; performing second testing by testing, at a second temperature different from the first temperature, a semiconductor device for setting having been determined as being non-defective and by detecting a breakdown voltage at which the semiconductor device for setting is broken; acquiring a relationship between the inspection voltage and the breakdown voltage; and setting an applied voltage used when testing a semiconductor device under test at the first temperature, based on the acquired relationship.