Compact Semiconductor Wafer Benchmark Device Using Integrated Waveguide

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing process control monitoring (PCM) devices for semiconductor wafers are bulky due to multiple optical components and electronic elements, which compromises their reliability and efficiency in evaluating semiconductor wafers.

Innovation Solution

A compact benchmark device with a waveguide and grating couplers is designed to evaluate semiconductor wafers, incorporating a bending section with specific dimensions and a splitter to divide or combine optical signals, thereby improving reliability and accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional PCM devices with multiple optical components and electronic elements are used, then monitoring functionality is achieved, but device size increases and reliability decreases

Engineering Contradiction:
Improvedevice reliabilityVSAvoidoptical components and electronic elements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple optical components (waveguide, grating couplers, splitters) and electronic elements into a single integrated benchmark device structure. This merging eliminates the need for separate components while maintaining all necessary monitoring functions, directly resolving the contradiction between reliability and device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The benchmark device is designed as a multi-functional integrated structure that performs signal transmission, signal splitting, optical coupling, and wafer evaluation simultaneously. This universal design allows a single device to replace multiple specialized components, improving reliability while reducing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If traditional PCM devices are used, then monitoring capability is provided, but device size becomes large

Engineering Contradiction:
Improvewafer evaluation efficiencyVSAvoiddevice size
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent implements a nested structure where the waveguide contains integrated grating couplers and splitters within its geometry. The grating couplers are positioned at specific locations along the waveguide path, and splitters are embedded within the waveguide structure, creating a compact nested arrangement that minimizes device footprint while maintaining full functionality.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent utilizes three-dimensional spatial arrangement of optical components within the waveguide structure, positioning grating couplers and splitters at different depths and angles rather than linear sequences. This dimensional optimization allows compact packaging of multiple components without increasing the device's planar footprint, thereby improving productivity while reducing device size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The compact benchmark device enhances the reliability and accuracy of semiconductor wafer evaluation by reducing size and signal loss while maintaining efficient signal transmission and processing.

Implementation Method 1

a waveguide having at least one bending section and being arranged in communication with the first grating coupler and the second grating coupler

Methodology Applied
Scientific EffectTotal internal reflection: Total Internal Reflection

Implementation Method 2

a first grating coupler, a second grating coupler... incorporating a bending section with specific dimensions and a splitter to divide or combine optical signals

Methodology Applied
Scientific EffectDiffraction: Diffraction

Data Source

PatentUS20250199063A1Benchmark device and method for evaluating a semiconductor wafer
Publication Date: 2025.06.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250199063A1 patent drawing
  • US20250199063A1 patent drawing
  • US20250199063A1 patent drawing

AI summary

A benchmark device and a method for evaluating a semiconductor wafer are provided. The benchmark device includes a first grating coupler, a second grating coupler and a waveguide. The waveguide has a least one bending section and is arranged in communication with the first grating coupler and the second grating coupler. The bending section comprises a first region having a first width and a first height, and a second region having a second width and a second height, wherein the first region is surrounded by the second region, and the second width decreases gradually from a first end of the bending section to a second end of the bending section.