Semiconductor Wafer Damascening for Flatness and Crack Reduction
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Solution Overview
Problem
Existing semiconductor manufacturing methods result in curving and cracking of wafers due to differential internal strains on the front and rear main faces, particularly for large diameter wafers, leading to machine contamination and increased manufacturing costs.
Innovation Solution
Implement damascening on both the front and rear main faces of the semiconductor wafer to form trenches, followed by low-pressure chemical vapor deposition of a second material, and a levelling step to ensure the second layer extends only within these trenches, thereby reducing internal strain differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a layer is formed uniformly over the entire surface of the semiconductor wafer, then the layer provides complete coverage, but internal strains increase causing wafer curving and cracking
Solution Approach 1:
The patent applies segmentation by forming trenches that divide the continuous layer into discrete regions. The layer is segmented to extend only in the trenches and between them in a predetermined pattern, rather than uniformly across the entire wafer surface. This segmentation reduces internal strains while maintaining functional coverage where needed.
Solution Approach 2:
The patent implements local quality by creating a non-uniform layer distribution where the layer extends only in specific trenches and between them in a predetermined pattern, rather than uniformly everywhere. This localized presence of the layer reduces overall internal strain while maintaining functionality in critical areas.
2Manufacturing precision
If damascening is implemented only on the front main face, then the front layer is properly formed, but differential internal strains cause wafer curving and rear layer cracking
Solution Approach 1:
The patent applies asymmetry by implementing different trench patterns on the front and rear main faces of the wafer. The trenches on each face are configured according to specific design requirements, creating an asymmetric structure that balances internal strains while maintaining functional performance on both surfaces.
Solution Approach 2:
The patent uses the counterweight principle by forming trenches on both the front and rear main faces to create opposing structures that balance each other's internal strains. The trenches act as counterbalancing elements that compensate for strain differences between the two faces, preventing wafer curving and cracking.
3Productivity
If large diameter wafers are used to increase production, then productivity increases, but the risk of curving and cracking increases due to greater internal strain differences
Solution Approach 1:
The patent applies segmentation by forming trenches that divide the layer into discrete regions distributed in a predetermined pattern across the large diameter wafer. This segmentation reduces internal strains throughout the wafer, making it possible to use larger diameter wafers for increased production without suffering from curving and cracking issues.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the risk of wafer curving and cracking, maintaining wafer flatness and preventing machine contamination, allowing larger diameter wafers to be used for increased integrated circuit production.
Implementation Method 1
forming a second layer of a second material on each first layer, so that a second front layer of second material extends over the first layer formed on the front main face of the semiconductor substrate wafer, in the trenches and between the trenches of the first layer
Data Source
AI summary
In accordance with an embodiment, a method for manufacturing a semiconductor device includes forming a first front layer and a first rear layer of a first material respectively on a front main face and a rear main face of a semiconductor substrate wafer; forming a first plurality of trenches and a second plurality of trenches respectively in a surface of the first front layer and in a surface of the first rear layer; forming a second front layer of a second material on the first front layer, where the second front layer extends over the first front layer, in the first plurality of trenches, and between the first plurality of trenches on the surface of the first front layer; and forming a second rear layer of the second material on the surface of the first rear layer, wherein the second rear layer extends over the first rear layer, in the second plurality of trenches, and between the second plurality of trenches on the surface of the first rear layer.