Semiconductor Wafer Dicing via Plasma Etching for Flawed Device Marking
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Solution Overview
Problem
Conventional methods for marking flawed semiconductor devices during the dicing process create protuberant portions on the circuit formation face, leading to non-uniform thickness and quality degradation of semiconductor wafers, as the marking process hinders the uniformity of the thickness of manufactured devices.
Innovation Solution
A dicing method using plasma etching to define dicing lines on a semiconductor wafer, where a mask is placed to partially or entirely expose flawed devices, allowing for precise removal of flawed devices as distinguishing marks, thereby preventing quality degradation and maintaining uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bad marks are formed on the circuit formation face using conventional marking methods (ink or resist film), then flawed semiconductor devices can be distinguished from good devices, but smooth protuberant portions are formed on the circuit formation face which cause non-uniform thickness and quality degradation after polishing
Solution Approach 1:
The invention moves the marking operation from the circuit formation face (one dimension) to the opposite face (another dimension). By forming bad marks on the opposite face through plasma etching after thinning, the marking process no longer creates protuberances on the circuit formation face that would interfere with polishing uniformity, thus resolving the contradiction between quality management and thickness uniformity.
Solution Approach 2:
The invention changes the physical state and formation method of bad marks. Instead of using ink or resist film that creates surface protuberances, the invention uses plasma etching to remove material and form recessed marks on the opposite face. This parameter change in marking method eliminates the harmful protuberances while maintaining the quality management function.
2Manufacturing precision
If plasma etching is applied to the mask placement-side surface to dice the semiconductor wafer, then dicing lines are defined and flawed devices can be removed, but the process complexity increases compared to conventional marking methods
Solution Approach 1:
The invention merges the dicing process with the bad mark formation process. By placing the mask to simultaneously define both dicing lines and expose flawed devices, and then applying plasma etching once to accomplish both tasks, the invention eliminates the need for separate marking and dicing operations, thus reducing overall process complexity while maintaining high precision.
Solution Approach 2:
The mask and plasma etching process are given multiple functions: defining dicing lines for separation and forming bad marks on flawed devices. This multi-functionality approach consolidates what would traditionally be separate operations into a unified process, reducing complexity while achieving both objectives with high precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively distinguishes flawed devices from others without degrading the quality of semiconductor devices, ensuring uniform thickness and efficient formation of bad marks, stabilizing the quality of diced semiconductor devices.
Implementation Method 1
dicing (separating or dividing) the semiconductor wafer into the respective semiconductor devices along the defined dicing lines and removing an exposed portion of the flawed semiconductor device so as to form a removed portion as a distinguishing mark for the flawed semiconductor device, by applying plasma etching to the mask placement-side surface of the semiconductor wafer
Data Source
AI summary
On a mask placement-side surface of a semiconductor wafer in which a plurality of semiconductor devices are formed, a mask is placed, while dicing lines for dicing the semiconductor wafer into the respective separate semiconductor devices are defined and a surface of a flawed semiconductor device among the respective semiconductor devices is partially exposed, and then plasma etching is applied to the mask placement-side surface of the semiconductor wafer so as to dice the semiconductor wafer into the respective semiconductor devices along the defined dicing lines, and an exposed portion of the flawed semiconductor device is removed so as to form a removed portion as a flawed semiconductor device distinguishing mark.