Semiconductor Wafer Structure for Higher Gate Breakdown Voltage
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Solution Overview
Problem
Existing methods for manufacturing large-diameter wafers using the magnetic field applied Czochralski (MCZ) method result in higher oxygen concentration, leading to crystal defects that reduce gate breakdown voltage, and require additional processes and costs to maintain low oxygen concentration, making it difficult to enhance gate breakdown voltage effectively.
Innovation Solution
A semiconductor device design with a silicon substrate having a cell part and a termination part, where the cell part has a lower vacancy density in crystal defects than the termination part, utilizing high-temperature thermal treatment to reduce oxygen concentration and enhance implantation efficiency of inter-lattice silicon, thereby improving gate breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the MCZ method is used to manufacture large-diameter wafers, then wafer size increases and material costs are reduced, but oxygen concentration increases leading to crystal defects that reduce gate breakdown voltage
Solution Approach 1:
The patent applies different vacancy concentrations to different regions of the semiconductor device. The cell part is designed with lower vacancy concentration to maintain high gate breakdown voltage, while the termination part allows higher vacancy concentration. This regional differentiation resolves the contradiction by optimizing each area for its specific functional requirements.
Solution Approach 2:
The patent changes the vacancy concentration parameter selectively in different parts of the device. By controlling the vacancy concentration to be lower in the cell part compared to the termination part, the patent achieves high gate breakdown voltage while maintaining compatibility with MCZ manufacturing for large-diameter wafers.
2Reliability
If oxygen concentration is reduced in MCZ wafers using carrier wafer adhesion and oxygen diffusion, then gate breakdown voltage improves, but process complexity and costs increase
Solution Approach 1:
The patent utilizes the self-service mechanism where the termination part with higher vacancy concentration naturally serves as an oxygen source during thermal treatment. This eliminates the need for external carrier wafers and additional oxygen management processes, reducing complexity while maintaining low oxygen concentration in the cell part.
Solution Approach 2:
The patent merges the oxygen management function into the device structure itself by designing the termination part with higher vacancy concentration. This combines the structural termination function with the oxygen reservoir function, eliminating the need for separate carrier wafers and reducing process complexity.
3Reliability
If vacancies in crystal defects are reduced in the cell part, then gate breakdown voltage is enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies different vacancy concentrations to different regions of the semiconductor device. The cell part is designed with lower vacancy concentration to maintain high gate breakdown voltage, while the termination part allows higher vacancy concentration. This regional differentiation resolves the contradiction by optimizing each area for its specific functional requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach effectively reduces crystal defects and enhances gate breakdown voltage by selectively forming oxide films and performing thermal treatments to minimize oxygen vacancies in the cell part, allowing for easier improvement of gate breakdown voltage without increasing process complexity or costs.
Implementation Method 1
utilizing high-temperature thermal treatment to reduce oxygen concentration
Implementation Method 2
oxygen is diffused from the device wafer to the carrier wafer during any beneficial thermal treatment
Data Source
AI summary
A semiconductor device according to the present disclosure includes: a first conductivity-type silicon substrate including a cell part and a termination part surrounding the cell part in plan view; a first conductivity-type emitter layer provided on a front surface of the silicon substrate in the cell part; a second conductivity-type collector layer provided on a back surface of the silicon substrate in the cell part; a first conductivity-type drift layer provided between the emitter layer and the collector layer; a trench gate provided to reach the drift layer from a front surface of the emitter layer; and a second conductivity-type well layer provided on the front surface of the silicon substrate in the termination part. Vacancies included in a crystal defect in the cell part are less than vacancies included in a crystal defect in the termination part.


