Semiconductor Wafer Lamination for FinFET Carrier Mobility
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Solution Overview
Problem
Existing FinFET technologies face challenges in optimizing carrier mobility for both n-type and p-type transistors on a shared semiconductor substrate, with conventional techniques complicating layout and increasing installation area due to the need for precise angular alignment of crystal directions.
Innovation Solution
A semiconductor device is fabricated by laminating a second substrate at a predetermined angle to a first substrate, allowing for the formation of n-type and p-type FinFETs with optimal channel directions, where the crystal-axis direction of the second fin is mismatched by a specific angle relative to the first substrate, enabling parallel or vertical layout without increasing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional techniques are used to form n-type and p-type FinFETs with optimal crystal directions, then carrier mobility is improved, but layout complexity and installation area increase
Solution Approach 1:
The substrate is divided into two separate wafers (first wafer and second wafer) with different crystal orientations. Each wafer can be independently processed and optimized for specific transistor types, then bonded together. This segmentation allows each wafer to have simplified, optimized layouts rather than forcing all transistors into a single complex orientation scheme.
Solution Approach 2:
The solution moves from a two-dimensional planar layout problem to a three-dimensional stacked structure. By bonding two wafers vertically, the patent enables different crystal orientations in different vertical layers, resolving the layout complexity issue while maintaining optimal carrier mobility directions for both n-type and p-type FinFETs.
2Reliability
If precise angular alignment of crystal directions is implemented, then optimal channel directions are achieved, but manufacturing precision requirements increase
Solution Approach 1:
The crystal orientations are predetermined and prepared in separate wafers before bonding. Each wafer is fabricated with its optimal crystal direction already established, eliminating the need for complex real-time angular alignment during the bonding process. The preliminary preparation of each wafer's crystal structure simplifies the manufacturing precision requirements.
Solution Approach 2:
Different regions (wafers) are given different crystal orientations optimized for their specific transistor types. The first wafer is optimized for n-type FinFETs while the second wafer is optimized for p-type FinFETs, allowing each local region to have its own optimal crystal quality without compromising the other.
3Reliability
If different crystal directions are given to n-type and p-type device regions, then carrier mobility is optimized, but substrate complexity increases
Solution Approach 1:
The substrate is segmented into two separate wafers, each with a uniform crystal orientation optimized for specific transistor types. This avoids the complexity of having multiple crystal directions within a single monolithic substrate, as each wafer maintains local crystal uniformity while the stacked structure provides the diversity needed for both n-type and p-type optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves carrier mobility by allowing for a simpler and more reliable layout of n-type and p-type FinFETs on the same substrate, reducing the risk of hot carrier effects and enhancing operational reliability while maintaining cost-effectiveness.
Implementation Method 1
a second substrate, of which plane direction of the principal surface is same as that of a first substrate, on the first substrate in the state that the crystal-axis directions in the principal surfaces of the first and second substrates are at a predetermined angle around a direction vertical to the principal surface to each other
Implementation Method 2
substantially matching the crystal-axis direction of the unit cell of the first fin to that of the first substrate by recrystallizing the amorphized first fin using the first substrate as a base
Data Source
AI summary
A semiconductor substrate according to an embodiment includes: a first semiconductor wafer having a first crystal; and a second semiconductor wafer formed of a second crystal substantially same as the first crystal on the first semiconductor wafer, a crystal-axis direction of unit cell thereof being twisted at a predetermined angle around a direction vertical to a principal surface of the second semiconductor wafer from that of the first semiconductor wafer.