Semiconductor Wafer Lamination via Provisional Pressure Bonding

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Solution Overview

Problem

Conventional semiconductor device manufacturing methods face increased mounting time and higher chances of joining defects as the number of laminations and mounting sites increase, particularly due to the complexity of aligning and bonding multiple semiconductor wafers with chip parts.

Innovation Solution

A method involving provisional pressure bonding, cutting, and main pressure bonding steps, where semiconductor wafers with chip parts are laminated using an adhesive, heated to specific viscosities, and then cut using progressively narrower dicing blades, followed by main bonding under controlled pressure to ensure precise alignment and minimize defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional repeated bonding and solder joining steps are used to laminate semiconductor wafers, then bonding defects between substrate and semiconductor parts are reduced, but manufacturing time increases significantly as the number of laminations and mounting sites increase

Engineering Contradiction:
Improvebonding defect reductionVSAvoidmanufacturing time
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the bonding process into two distinct stages: provisional pressure bonding (heating to specific viscosity without full curing) and main pressure bonding (heating to curing temperature and solder melting point). This segmentation allows the adhesive to be applied and positioned without completing the full bonding cycle immediately, enabling subsequent cutting operations before final bonding, thereby reducing total manufacturing time while maintaining bonding quality

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary pressure bonding to achieve specific viscosity of the adhesive before completing the full bonding process. This preliminary action allows the adhesive to set in position and enables cutting operations to be performed on the laminated structure before final curing, reducing the need for repeated bonding cycles and decreasing overall manufacturing time

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If multiple semiconductor wafers are laminated with increasing number of mounting sites, then device functionality is enhanced, but alignment precision and joining defect rates worsen

Engineering Contradiction:
Improvedevice functionalityVSAvoidalignment precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent performs preliminary alignment and provisional pressure bonding of multiple semiconductor wafers before cutting. This preliminary action ensures that all wafers are correctly positioned and bonded together as a unit, maintaining alignment precision even as the number of laminations and mounting sites increases

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent separates the bonding and cutting operations by performing provisional bonding first, then cutting the laminated structure, and finally completing the main pressure bonding. This segmentation allows alignment to be established once during provisional bonding, and maintained through the cutting process, rather than requiring realignment after each cut, thereby preserving manufacturing precision

Inventive Principle:
Principle #1Segmentation

3Strength

If adhesive is heated to high temperature for curing, then bonding strength is improved, but adhesive viscosity control and void formation increase

Engineering Contradiction:
Improvebonding strengthVSAvoidviscosity control
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The patent segments the heating process into two temperature stages: first heating to a lower temperature to achieve specific viscosity for positioning and provisional bonding, then subsequently heating to a higher curing temperature and solder melting point for final bonding. This segmented temperature control prevents excessive void formation during the first stage while ensuring complete curing and strong bonding in the second stage

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the temperature parameter in two distinct phases: first controlling temperature to achieve specific viscosity range for adhesive application and provisional bonding, then increasing temperature to curing temperature and solder melting point for final bonding. This parameter change strategy ensures proper viscosity control during application while achieving maximum bonding strength in the final stage

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces manufacturing time, minimizes voids and misalignment, and decreases the likelihood of joining defects between chip parts, while expelling defective products, thereby enhancing the efficiency and accuracy of semiconductor device lamination.

Implementation Method 1

heating so that the adhesive reaches a specific viscosity

Methodology Applied
Scientific EffectViscosity change with temperature:

Implementation Method 2

heating to at least the melting point of the solder, and pressing the provisional pressure-bonded laminate chip part under a main pressure bonding load so that the solder comes into contact with the through-electrodes of adjacent chip parts

Methodology Applied
Scientific EffectMelting: Melting

Implementation Method 3

heating the provisional pressure-bonded laminate chip part to at least the curing temperature of the adhesive

Methodology Applied
Scientific EffectCuring:

Data Source

PatentUS10181460B2Method for manufacturing semiconductor device, semiconductor mounting device, and memory device manufactured by method for manufacturing semiconductor device
Publication Date: 2019.01.15 TORAY ENG CO LTD
  • US10181460B2 patent drawing
  • US10181460B2 patent drawing
  • US10181460B2 patent drawing

AI summary

A method for manufacturing a semiconductor device includes laminating a plurality of semiconductor wafers via an adhesive, heating such that the adhesive reaches a specific viscosity, and pressing the semiconductor wafers under a provisional pressure bonding load such that a gap between solder of through-electrodes provided to chip parts and through-electrodes of an adjacent semiconductor wafer falls within a specific range that is greater than zero, to produce a provisional pressure-bonded laminate; cutting the provisional pressure-bonded laminate with a cutter to produce a provisional pressure-bonded laminate chip part; and heating the provisional pressure-bonded laminate chip part to at least curing temperature of the adhesive and at least melting point of the solder, and pressing the provisional pressure-bonded laminate chip part under a main pressure bonding load to produce a main pressure-bonded laminate chip part such that the solder comes into contact with the through-electrodes of adjacent chip parts.