Diced Semiconductor Wafer MMIC Packaging for Weight Reduction
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Solution Overview
Problem
Conventional MMIC packaging using ceramic materials results in significant weight and size issues, limiting scan performance and increasing parasitic capacitances and inductances in phased antenna array systems, particularly at higher frequencies.
Innovation Solution
The use of diced semiconductor wafers as packaging material, forming hermetically sealed cavities with multiple semiconductor layers, including III-V materials like gallium arsenide and silicon, to integrate RF and digital transistors, MEMS, and radiating elements in a compact, low-mass package, reducing parasitic effects and enabling smaller, lighter transceiver circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ceramic packaging materials are used for MMIC assemblies, then environmental protection and structural integrity are provided, but weight and size increase significantly
Solution Approach 1:
The patent merges the circuit substrate and packaging housing into a single integrated structure where the substrate itself forms the housing walls. The circuit board serves dual functions as both the mounting platform for electronic components and the structural enclosure, eliminating the need for separate ceramic packaging materials and thereby reducing overall weight while maintaining environmental protection.
Solution Approach 2:
The substrate is designed to perform multiple functions simultaneously: it provides mechanical support for mounting electronic components, forms the structural housing enclosure, provides electrical interconnections through ground planes and signal traces, and offers environmental sealing. This multi-functionality eliminates the need for separate dedicated packaging components.
2Strength
If ceramic packaging materials are used for MMIC assemblies, then structural integrity is provided, but size increases and scan performance is limited
Solution Approach 1:
The substrate and housing are merged into one integrated component where the substrate forms the housing walls directly. This integration eliminates the need for additional packaging layers and reduces the overall volume of the assembly while maintaining structural integrity through the substrate's inherent strength and the ground plane's rigidity.
Solution Approach 2:
The ground planes are positioned in close proximity to each other, creating a three-dimensional configuration that provides structural rigidity and mechanical strength without increasing the external dimensions of the packaging assembly. The vertical stacking of ground planes and circuit layers achieves strength through dimensional optimization rather than material volume.
3Volume of moving object
If conventional BGA packaging is used, then compact size is achieved, but parasitic capacitances and inductances increase at higher frequencies
Solution Approach 1:
The patent extracts and eliminates the intermediate packaging layers and connector interfaces that are present in conventional BGA designs. By directly mounting components to the substrate and using the substrate itself as the housing, the design removes the sources of parasitic capacitances and inductances associated with traditional packaging structures, thereby reducing electromagnetic interference at higher frequencies.
4Reliability
If ceramic packaging materials are used, then environmental sealing is provided, but weight dominates the overall array system
Solution Approach 1:
The substrate and housing are combined into a single integrated structure, eliminating the need for separate heavy ceramic packaging materials. The substrate itself provides the environmental sealing barrier while being significantly lighter than traditional ceramic housings, thereby reducing the overall weight of the array system.
Solution Approach 2:
The patent changes the material parameter from heavy ceramic to lightweight substrate material (such as printed circuit board material), while maintaining the environmental sealing function through the integrated housing design. This material substitution dramatically reduces weight without compromising the sealing capability.
Data Source
AI summary
An integrated packaging assembly for an MMIC that uses the semiconductor wafers on which circuit elements are fabricated as the package. The packaging assembly includes a plurality of semiconductor layers that have been diced from the semiconductor wafers, where the semiconductor layers can be made of different semiconductor material. The semiconductor layers define cavities therebetween in which circuit components are fabricated. A sealing ring seals the semiconductor layers together so as to hermetically seal the circuit components within the cavities.