Semiconductor Wafer Singulation via Stealth Dicing
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Solution Overview
Problem
The challenge in semiconductor manufacturing is the efficient singulation of thin semiconductor wafers while protecting the wafers and bumps from damage during the back-end manufacturing process, as thinner wafers become more susceptible to damage and functional loss during handling and assembly.
Innovation Solution
A method involving a carrier with an adhesive covering the semiconductor wafer's bumps, where irradiated energy is applied to create a modified region within a non-active area, allowing for precise singulation of the wafer along this region without damaging the bumps or the wafer, using techniques like stealth dicing to reduce kerf width and protect the semiconductor die during handling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If mechanical dicing is used to singulate the wafer, then singulation can be performed, but the thin wafers and bumps are damaged
Solution Approach 1:
The patent replaces mechanical dicing with a chemical etching process. The wafer is mounted on a carrier with adhesive, and chemical etchant is applied to the non-active regions to create modified regions that allow for separation. This chemical approach eliminates the mechanical contact that damages thin wafers and bumps, while still achieving effective singulation.
Solution Approach 2:
The patent introduces a carrier with adhesive as an intermediary between the wafer and the handling system. The adhesive secures the wafer to the carrier during the singulation process, providing support and protection to thin wafers. This intermediary structure allows the wafer to be manipulated without direct mechanical contact that would cause damage.
2Manufacturing precision
If stealth dicing is used instead of mechanical dicing, then Si chipping is reduced, but thin wafers and bumps are still exposed and without protection
Solution Approach 1:
The patent applies adhesive beforehand to the carrier, which then protects the bumps and thin wafer regions during the singulation process. This pre-applied protective layer cushions the vulnerable areas from damage that would otherwise occur during handling and separation, eliminating the need for post-singulation protection.
3Volume of moving object
If the wafer thickness is reduced to enable thinner integrated packages, then package size is reduced, but the wafer becomes more susceptible to damage
Solution Approach 1:
The patent performs preliminary mounting of the thin wafer onto a carrier with adhesive before any singulation or handling operations. This preliminary action provides structural support to the thin wafer, compensating for its reduced strength due to thinning. The carrier acts as a temporary reinforcement that is removed after singulation, allowing the wafer to maintain integrity throughout the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the efficiency of singulating semiconductor wafers by reducing the risk of damage to the wafers and bumps, enabling more compact and reliable semiconductor devices with improved handling and assembly processes, while also allowing for more space-efficient die arrangements and reduced manufacturing defects.
Implementation Method 1
applying irradiated energy to the non-active region to form a modified region within the non-active region
Data Source
AI summary
A semiconductor device comprises a carrier including an adhesive disposed over the carrier. The semiconductor device further comprises a semiconductor wafer including a plurality of semiconductor die separated by a non-active region. A plurality of bumps is formed over the semiconductor die. The semiconductor wafer is mounted to the carrier with the adhesive disposed around the plurality of bumps. Irradiated energy is applied to the non-active region to form a modified region within the non-active region. The semiconductor wafer is singulated along the modified region to separate the semiconductor die. The semiconductor wafer is singulated along the modified region by applying stress to the semiconductor wafer. The adhesive is removed from around the plurality of bumps after singulating the semiconductor wafer. The semiconductor wafer includes a plurality of semiconductor die comprising through silicon vias. The modified region optionally includes a plurality of vertically stacked modified regions.


