Semiconductor Wafer Test Apparatus Dynamic Probe Contact Control

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Solution Overview

Problem

The existing test apparatus for semiconductor wafers is inefficient as it always contacts predetermined positions, leading to ineffective use of probe card measurement sites and prolonged testing times due to contact with both defective and non-defective devices.

Innovation Solution

A test apparatus with a probe card and control unit that dynamically determines contact positions and order based on device state and probe card arrangement, minimizing contact with defective devices and optimizing the use of measurement sites to improve efficiency and quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the probe card always contacts at predetermined positions, then the contact position is stable and simple to control, but test efficiency deteriorates because measurement sites are not effectively used

Engineering Contradiction:
Improvecontact position stabilityVSAvoidtest efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The probe card contact positions are dynamically adjusted based on device test results. After testing, the system determines which devices are defective and modifies subsequent contact positions to avoid defective devices, thereby optimizing measurement site utilization while maintaining operational simplicity through automated control

Inventive Principle:
Principle #15Dynamics

2Reliability

If all measurement sites are contacted regardless of device state, then complete coverage is achieved, but time is wasted contacting defective devices that don't need testing

Engineering Contradiction:
Improvetest coverageVSAvoidtesting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system extracts and identifies defective devices from the test results and removes them from subsequent testing sequences. By separating defective devices from the testing process, the system maintains comprehensive coverage for non-defective devices while eliminating unnecessary time spent on already-identified defective devices

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system performs preliminary identification of defective devices through initial testing and uses this information to pre-plan subsequent contact positions. This preliminary action allows the system to avoid contacting defective devices in future test cycles, reducing overall testing time while maintaining reliability

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11714106B2Test apparatus, test method and recording medium
Publication Date: 2023.08.01 RENESAS ELECTRONICS CORP
  • US11714106B2 patent drawing
  • US11714106B2 patent drawing
  • US11714106B2 patent drawing

AI summary

Provided is a technique capable of improving test efficiency of semiconductor devices. A test apparatus includes a probe card having a plurality of measurement sites that contact with a plurality of semiconductor devices formed on a semiconductor wafer; a control unit configured to generate map information, probe-card form information, and contact-position information, the map information including position information and peculiar information of the semiconductor devices on the semiconductor wafer, the probe-card form information including arrangement information of the measurement sites, the contact-position information indicating a contact position that is a range of the semiconductor device tested at one time by the probe card based on constrained-condition information of limiting contact with the probe card; and a position control unit configured to control a relative position between the probe card and the semiconductor wafer based on the contact-position information.