Semiconductor Wall Trimming to Reduce STI Loss and Epitaxy Damage
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Solution Overview
Problem
Heavy etching during wall trimming in semiconductor manufacturing leads to extra STI material loss and epitaxy damage.
Innovation Solution
A method involving the formation of growth portions on the dummy gate to expose corners of the oxide layer material, followed by the construction of a wall within the recess, allowing for lighter etching to trim the wall without damaging the spacer or epitaxy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If heavier etching is applied for wall trimming, then the wall can be trimmed to expose the top of the silicon sheet, but extra STI material loss and epitaxy damage occur
Solution Approach 1:
The patent applies preliminary action by forming growth portions on the dummy gate before wall trimming. These growth portions protrude beyond the oxide layer corners, allowing the etching process to start from a predetermined position and proceed only to the required depth. This prevents over-etching and protects the STI layer from excessive material loss while still achieving complete wall trimming to expose the silicon sheet top.
Solution Approach 2:
The patent changes the physical parameters of the etching process by controlling the etching depth and duration based on the predetermined position established by the growth portions. Instead of applying heavy etching uniformly, the process parameters are adjusted to etch only until the etching tool reaches the predetermined position, thereby reducing STI material loss while maintaining wall trimming precision.
2Manufacturing precision
If heavier etching is applied for wall trimming, then the wall can be trimmed to expose the top of the silicon sheet, but epitaxy damage worsens
Solution Approach 1:
The growth portions formed on the dummy gate serve as preliminary protective structures that define the etching boundary. By establishing this predetermined position before etching, the process prevents the etching tool from damaging the epitaxial structure. The etching stops when it reaches the predetermined position, avoiding the harmful effects of prolonged or excessive etching on the epitaxy.
Solution Approach 2:
The growth portions act as an intermediary structure between the etching process and the underlying epitaxial structure. They absorb the harsh etching conditions and protect the sensitive epitaxy from direct exposure to heavy etching. The etching process interacts with the growth portions first, and only after removing these intermediary structures does the etching reach the wall, thereby preventing direct damage to the epitaxy.
3Loss of substance
If lighter etching is used to reduce STI material loss and epitaxy damage, then structural integrity is maintained, but wall trimming effectiveness may be compromised
Solution Approach 1:
The predetermined position established by the growth portions ensures that lighter etching is applied at the correct location and to the correct depth. The etching process is guided to start from the growth portions and proceed only to the predetermined position, guaranteeing complete wall trimming even with reduced etching intensity. This preliminary positioning eliminates the risk of insufficient wall trimming that might otherwise occur with lighter etching.
Solution Approach 2:
The patent applies local quality by concentrating the etching action precisely where needed - at the wall region between the growth portions and the oxide layer. The etching is applied locally to the wall trimming area rather than uniformly across the entire structure. This localized application of lighter etching is sufficient to complete the wall trimming while minimizing impact on surrounding areas like the STI layer and epitaxy.
Data Source
AI summary
A semiconductor device includes a substrate, a first active structure, a second active structure, a wall and a STI layer. The first active structure is formed on the substrate. The second active structure is formed on the substrate. The wall is formed between the first active structure and the second active structure. The STI layer is formed adjacent to the first active structure and has an upper surface. A distance between a spacer of the first active structure and the upper surface of the STI layer may range between 0 and 50 nanometers.