Semiconductor Optical Waveguide Layout for Differential Modulation

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Solution Overview

Problem

Conventional semiconductor devices integrated on conductive substrates cannot achieve differential modulation driving due to shared common potential, leading to impaired flatness and crystal quality of semiconductor layers, resulting in waveguide loss during electrode separation on semi-insulating substrates.

Innovation Solution

A semiconductor device is fabricated using a semi-insulating compound semiconductor substrate with optically connected waveguide type first and second optical elements, where each element has specific conductivity type layers and active layers, and a semi-insulating compound semiconductor cladding forms an optical waveguide, allowing for electrical separation without waveguide loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a conductive substrate is used for monolithic integration, then device integration is achieved, but differential modulation driving cannot be realized due to common potential

Engineering Contradiction:
Improvedifferential modulation driving capabilityVSAvoidelectrical separation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The substrate is divided into first and second element regions with different conductivity types (n-type and p-type), allowing independent electrical control of each optical element region while maintaining monolithic integration

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the substrate are assigned different conductivity types and potential controls, enabling localized electrical separation and differential modulation driving in specific areas while maintaining overall integration

Inventive Principle:
Principle #3Local quality

2Reliability

If electrode separation is performed on semi-insulating substrate by butt joint process, then electrical separation is achieved, but flatness of semiconductor layers is impaired

Engineering Contradiction:
Improveelectrical separation effectivenessVSAvoidflatness of semiconductor layers
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The core layer is formed in the separation region before the active layers, establishing a reference level that guides subsequent layer formation and ensures flatness is maintained throughout the stacking process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The core layer acts as a leveling layer that compensates for height differences between stacked semiconductor layers, creating an equipotential surface that maintains flatness for subsequent active layer formation

Inventive Principle:
Principle #12Equipotentiality

3Productivity

If active layer is grown on impaired flatness, then device fabrication continues, but in-plane uniformity and crystal quality are deteriorated

Engineering Contradiction:
Improvefabrication continuityVSAvoidin-plane uniformity and crystal quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The core layer is formed in advance in the separation region to establish a flat reference surface before active layers are deposited, preventing flatness impairment from propagating to subsequent layers

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The core layer serves as a cushioning layer that absorbs and compensates for flatness variations in the stacked semiconductor layers, protecting the active layers from inheriting these defects and maintaining crystal quality

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables effective electrical separation between optical elements, improving the S/N ratio and reducing common mode noise by allowing differential modulation driving without waveguide loss.

Implementation Method 1

a substrate including a semi-insulating compound semiconductor

Methodology Applied
Scientific EffectElectrical insulation: Electrical Resistance

Implementation Method 2

an optical waveguide formed in a separation region between the first element region and the second element region of the substrate, for optically connecting the first optical element and the second optical element

Methodology Applied
Scientific EffectOptical waveguide: Waveguide (optics)

Implementation Method 3

a first semiconductor layer including a compound semiconductor of a first conductivity type that is formed on the substrate; a second semiconductor layer including a compound semiconductor of a second conductivity type that is formed on the first active layer

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20240380181A1Semiconductor device and manufacturing method therefor
Publication Date: 2024.11.14 NIPPON TELEGRAPH & TELEPHONE CORP
  • US20240380181A1 patent drawing
  • US20240380181A1 patent drawing
  • US20240380181A1 patent drawing

AI summary

In an embodiment semiconductor device, a first optical element, a second optical element, and an optical waveguide for optically connecting the first optical element and the second optical element are provided on a substrate including a semi-insulating compound semiconductor. The first optical element is formed in a first element region of the substrate. The second optical element is formed in a second element region of the substrate. The optical waveguide is formed in a separation region between the first element region and the second element region of the substrate. The optical waveguide is configured by a cladding including a semi-insulating compound semiconductor on the substrate and a core including a compound semiconductor buried in the cladding.