Semiconductor Well Formation via Dielectric Masking
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Solution Overview
Problem
Conventional semiconductor device fabrication requires multiple mask levels for forming doped regions, leading to increased fabrication costs and reduced process throughput.
Innovation Solution
A method is developed to form semiconductor devices using a reduced number of mask levels by implanting dopants through a dielectric layer, allowing for the creation of multiple doped regions with different doping profiles without the need for additional mask levels, utilizing a dielectric layer as a hardmask to control dopant implantation and prevent unwanted doping of protected regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple mask levels are used to form doped regions with different doping profiles, then manufacturing precision is improved, but device complexity and fabrication cost increase
Solution Approach 1:
The dielectric layer is segmented into different thickness regions: a first thickness over the first unprotected region and a second thickness over the protected region. This segmentation allows different dopant penetration depths through the same dielectric layer, enabling multiple doped regions with different profiles without requiring multiple mask levels.
Solution Approach 2:
The patent transitions from a two-dimensional mask plane approach to a three-dimensional dielectric thickness approach. By varying the dielectric layer thickness in the vertical dimension, the patent achieves selective dopant blocking, allowing first dopant to reach the substrate in the first region while being blocked in the protected region, thereby creating multiple doped regions without additional mask levels.
2Manufacturing precision
If multiple mask levels are used to form doped regions, then manufacturing precision is improved, but process throughput decreases
Solution Approach 1:
Multiple doping operations that would traditionally require separate mask levels are merged into a single implantation step. The dielectric layer with varying thickness acts as a unified masking structure that simultaneously defines multiple doped regions, reducing the number of process cycles and improving throughput.
Solution Approach 2:
The dielectric layer is formed with predetermined varying thickness before the doping step. This preliminary structuring of the dielectric layer pre-defines the doping profiles for multiple regions, eliminating the need for sequential masking and doping operations during the actual device fabrication process.
3Ease of manufacture
If dopant is implanted through a dielectric layer with varying thickness, then ease of manufacture is improved, but manufacturing precision may be compromised
Solution Approach 1:
The dielectric layer thickness parameter is varied spatially to control dopant implantation. By changing the thickness parameter from a uniform value to a graded or stepped profile, the patent achieves precise control over dopant penetration depth and doping concentration, maintaining manufacturing precision while simplifying the overall fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces fabrication costs and enhances process throughput by enabling the formation of semiconductor devices with multiple doped regions using fewer mask levels, resulting in improved manufacturing efficiency.
Implementation Method 1
A first dopant is implanted into the first unprotected region through the first opening and into the protected region through the dielectric layer
Data Source
AI summary
A method is provided of forming a semiconductor device. A substrate is provided having a dielectric layer formed thereover. The dielectric layer covers a protected region of the substrate, and has a first opening exposing a first unprotected region of the substrate. A first dopant is implanted into the first unprotected region through the first opening in the dielectric layer, and into the protected region through the dielectric layer.