Semiconductor Well Area Segmentation for Driving Current
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Solution Overview
Problem
The design of semiconductor structures that require high driving current often results in suboptimal performance and yield for smaller dimensions, as the increased width of well areas leads to performance variations and edge effects, compromising the overall performance and yield of semiconductor devices.
Innovation Solution
A semiconductor structure with a well area of first conductive type, comprising a first and second device area of equal width, where the second device area provides a higher driving current by forming a second active area with a lower doping concentration and threshold voltage, and a gate dielectric layer of lesser thickness, effectively reducing the impact of well proximity effects and enhancing performance and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the width of the well area is increased to provide higher driving current, then the driving current capability is improved, but the performance and yield of smaller dimension devices deteriorate due to edge effects and performance variations
Solution Approach 1:
The well area is divided into multiple sub-well areas (first well area, second well area, third well area) with different widths. Each sub-well area can provide different driving currents independently, allowing the system to achieve high total driving current while maintaining small individual well widths to avoid edge effects and performance variations.
Solution Approach 2:
Different sub-well areas are assigned different widths according to their specific driving current requirements. The first well area has a first width, the second well area has a second width, and the third well area has a third width, where these widths can be optimized locally to match the driving current needs of different device units while avoiding the need for a uniformly large well area.
2Device complexity
If a single well area design is used for all device units, then the device structure is simple, but the performance varies across different device units due to position-dependent edge effects
Solution Approach 1:
The well area is segmented into multiple sub-well areas with different widths positioned at different locations. This segmentation allows each sub-well area to be optimized for its specific position, reducing edge effects and performance variations while maintaining a relatively simple overall structure that can be manufactured using standard processes.
Data Source
AI summary
A semiconductor structure includes a well area of first conductive type, which includes: a first device area, where a first active area is formed in the first device area, a first device unit is formed in the first active area and configured to provide a first type driving current; and a second device area, connected to the first device area in a length direction of the well area of first conductive type, where a second active area is formed in the second device area, a second device unit is formed in the second active area and configured to provide a second type driving current. A current value of the second type driving current is greater than a current value of the first type driving current. A width of well area of the first device area is the same as a width of well area of the second device area.